[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)
Fangrui Song via cfe-commits
cfe-commits at lists.llvm.org
Wed Apr 17 22:30:48 PDT 2024
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@@ -1,4 +1,4 @@
-// XFAIL: target={{.*}}-aix{{.*}}
+// XFAIL: target={{.*}}-aix{{.*}}, target=riscv{{.*}}
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MaskRay wrote:
This causes different behaviors with the default target triple, which is probably not perfect.
I think we can change the -mrelax-all check with an explicit target triple and then add a `--target=riscv64`.
https://github.com/llvm/llvm-project/pull/88538
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