[clang] [llvm] [AArch64] Add intrinsics for 16-bit non-widening FMLA/FMLS (PR #88553)

[via cfe-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "// kill:.*$" --version 4
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+
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CarolineConcatto wrote:

I believe we can add these tests in test/CodeGen/AArch64/sme2-intrinsics-fmlas.ll

https://github.com/llvm/llvm-project/pull/88553