[clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)
Jay Foad via cfe-commits
cfe-commits at lists.llvm.org
Tue Apr 2 02:59:39 PDT 2024
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@@ -2594,12 +2594,10 @@ bool SIMemoryLegalizer::expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
MOI.getOrdering() == AtomicOrdering::SequentiallyConsistent ||
MOI.getFailureOrdering() == AtomicOrdering::Acquire ||
MOI.getFailureOrdering() == AtomicOrdering::SequentiallyConsistent) {
- Changed |= CC->insertWait(MI, MOI.getScope(),
- MOI.getInstrAddrSpace(),
- isAtomicRet(*MI) ? SIMemOp::LOAD :
- SIMemOp::STORE,
- MOI.getIsCrossAddressSpaceOrdering(),
- Position::AFTER);
+ Changed |=
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jayfoad wrote:
Remove this.
https://github.com/llvm/llvm-project/pull/79236
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