[clang] [M68k] Change gcc register name from a7 to sp. (PR #87095)
Jim Lin via cfe-commits
cfe-commits at lists.llvm.org
Mon Apr 1 15:21:24 PDT 2024
https://github.com/tclin914 updated https://github.com/llvm/llvm-project/pull/87095
>From dec6021133f67304bfc9942a1a4985cce6a15645 Mon Sep 17 00:00:00 2001
From: Jim Lin <jim at andestech.com>
Date: Sat, 30 Mar 2024 01:37:49 +0800
Subject: [PATCH 1/2] [M68k] Change gcc register name from a7 to sp
In M68kRegisterInfo.td, register SP is defined with name x7 and alternate name a7.
Fixes: https://github.com/llvm/llvm-project/issues/78620
---
clang/lib/Basic/Targets/M68k.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/Basic/Targets/M68k.cpp b/clang/lib/Basic/Targets/M68k.cpp
index 1b7e0a7f32c9be..9e6b59f1e42a8d 100644
--- a/clang/lib/Basic/Targets/M68k.cpp
+++ b/clang/lib/Basic/Targets/M68k.cpp
@@ -127,7 +127,7 @@ bool M68kTargetInfo::hasFeature(StringRef Feature) const {
const char *const M68kTargetInfo::GCCRegNames[] = {
"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
- "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
+ "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp",
"pc"};
ArrayRef<const char *> M68kTargetInfo::getGCCRegNames() const {
>From ded6535bd84ac612f20ab116ae6690a2b5a70c0b Mon Sep 17 00:00:00 2001
From: Jim Lin <jim at andestech.com>
Date: Tue, 2 Apr 2024 05:06:09 +0800
Subject: [PATCH 2/2] Implement getGCCRegAliases and add testcase
Testcase is copied from
clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c.
---
clang/lib/Basic/Targets/M68k.cpp | 9 +-
clang/lib/Basic/Targets/M68k.h | 1 +
clang/test/CodeGen/M68k/inline-asm-gcc-regs.c | 134 ++++++++++++++++++
3 files changed, 142 insertions(+), 2 deletions(-)
create mode 100644 clang/test/CodeGen/M68k/inline-asm-gcc-regs.c
diff --git a/clang/lib/Basic/Targets/M68k.cpp b/clang/lib/Basic/Targets/M68k.cpp
index 9e6b59f1e42a8d..94f2630d953cdc 100644
--- a/clang/lib/Basic/Targets/M68k.cpp
+++ b/clang/lib/Basic/Targets/M68k.cpp
@@ -134,9 +134,14 @@ ArrayRef<const char *> M68kTargetInfo::getGCCRegNames() const {
return llvm::ArrayRef(GCCRegNames);
}
+const TargetInfo::GCCRegAlias M68kTargetInfo::GCCRegAliases[] = {
+ {{"bp"}, "a5"},
+ {{"fp"}, "a6"},
+ {{"usp", "ssp", "isp", "a7"}, "sp"},
+};
+
ArrayRef<TargetInfo::GCCRegAlias> M68kTargetInfo::getGCCRegAliases() const {
- // No aliases.
- return std::nullopt;
+ return llvm::ArrayRef(GCCRegAliases);
}
bool M68kTargetInfo::validateAsmConstraint(
diff --git a/clang/lib/Basic/Targets/M68k.h b/clang/lib/Basic/Targets/M68k.h
index a9c262e62fbad0..7ffa901127e504 100644
--- a/clang/lib/Basic/Targets/M68k.h
+++ b/clang/lib/Basic/Targets/M68k.h
@@ -25,6 +25,7 @@ namespace targets {
class LLVM_LIBRARY_VISIBILITY M68kTargetInfo : public TargetInfo {
static const char *const GCCRegNames[];
+ static const TargetInfo::GCCRegAlias GCCRegAliases[];
enum CPUKind {
CK_Unknown,
diff --git a/clang/test/CodeGen/M68k/inline-asm-gcc-regs.c b/clang/test/CodeGen/M68k/inline-asm-gcc-regs.c
new file mode 100644
index 00000000000000..40d3543d8a6f90
--- /dev/null
+++ b/clang/test/CodeGen/M68k/inline-asm-gcc-regs.c
@@ -0,0 +1,134 @@
+// RUN: %clang_cc1 -triple m68k -emit-llvm -O2 %s -o - | FileCheck %s
+
+/// Check GCC register names and alias can be used in register variable definition.
+
+// CHECK-LABEL: @test_d0
+// CHECK: call void asm sideeffect "", "{d0}"(i32 undef)
+void test_d0() {
+ register int a asm ("d0");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d1
+// CHECK: call void asm sideeffect "", "{d1}"(i32 undef)
+void test_d1() {
+ register int a asm ("d1");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d2
+// CHECK: call void asm sideeffect "", "{d2}"(i32 undef)
+void test_d2() {
+ register int a asm ("d2");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d3
+// CHECK: call void asm sideeffect "", "{d3}"(i32 undef)
+void test_d3() {
+ register int a asm ("d3");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d4
+// CHECK: call void asm sideeffect "", "{d4}"(i32 undef)
+void test_d4() {
+ register int a asm ("d4");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d5
+// CHECK: call void asm sideeffect "", "{d5}"(i32 undef)
+void test_d5() {
+ register int a asm ("d5");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d6
+// CHECK: call void asm sideeffect "", "{d6}"(i32 undef)
+void test_d6() {
+ register int a asm ("d6");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_d7
+// CHECK: call void asm sideeffect "", "{d7}"(i32 undef)
+void test_d7() {
+ register int a asm ("d7");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a0
+// CHECK: call void asm sideeffect "", "{a0}"(i32 undef)
+void test_a0() {
+ register int a asm ("a0");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a1
+// CHECK: call void asm sideeffect "", "{a1}"(i32 undef)
+void test_a1() {
+ register int a asm ("a1");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a2
+// CHECK: call void asm sideeffect "", "{a2}"(i32 undef)
+void test_a2() {
+ register int a asm ("a2");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a3
+// CHECK: call void asm sideeffect "", "{a3}"(i32 undef)
+void test_a3() {
+ register int a asm ("a3");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a4
+// CHECK: call void asm sideeffect "", "{a4}"(i32 undef)
+void test_a4() {
+ register int a asm ("a4");
+ asm ("" :: "r" (a));
+}
+
+// CHECK-LABEL: @test_a5
+// CHECK: call void asm sideeffect "", "{a5}"(i32 undef)
+void test_a5() {
+ register int a asm ("a5");
+ register int b asm ("bp");
+ asm ("" :: "r" (a));
+ asm ("" :: "r" (b));
+}
+
+// CHECK-LABEL: @test_a6
+// CHECK: call void asm sideeffect "", "{a6}"(i32 undef)
+void test_a6() {
+ register int a asm ("a6");
+ register int b asm ("fp");
+ asm ("" :: "r" (a));
+ asm ("" :: "r" (b));
+}
+
+// CHECK-LABEL: @test_sp
+// CHECK: call void asm sideeffect "", "{sp}"(i32 undef)
+void test_sp() {
+ register int a asm ("sp");
+ register int b asm ("usp");
+ register int c asm ("ssp");
+ register int d asm ("isp");
+ register int e asm ("a7");
+ asm ("" :: "r" (a));
+ asm ("" :: "r" (b));
+ asm ("" :: "r" (c));
+ asm ("" :: "r" (d));
+ asm ("" :: "r" (e));
+}
+
+// CHECK-LABEL: @test_pc
+// CHECK: call void asm sideeffect "", "{pc}"(i32 undef)
+void test_pc() {
+ register int a asm ("pc");
+ asm ("" :: "r" (a));
+}
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