[clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)

[James Y Knight via cfe-commits]

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@@ -770,6 +770,18 @@ bool TargetInfo::validateOutputConstraint(ConstraintInfo &Info) const {
     case 'E':
     case 'F':
       break;  // Pass them.
+    case '{': {
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jyknight wrote:

It's unclear to me whether this uses the same register parsing logic as the existing named-register asm on variables. It _looks_ like it's going to do something different, which worries me.

I think we ought to be accepting the exact same names in both syntaxes, on all platforms. Can you confirm if that's actually the case with this PR?

https://github.com/llvm/llvm-project/pull/85846