[clang] [clang][RISCV] Enable RVV with function attribute __attribute__((target("arch=+v"))) (PR #83674)
Luke Lau via cfe-commits
cfe-commits at lists.llvm.org
Thu Mar 21 01:31:13 PDT 2024
================
@@ -8927,8 +8927,13 @@ void Sema::CheckVariableDeclarationType(VarDecl *NewVD) {
}
}
- if (T->isRVVSizelessBuiltinType())
- checkRVVTypeSupport(T, NewVD->getLocation(), cast<Decl>(CurContext));
+ if (T->isRVVSizelessBuiltinType() && isa<FunctionDecl>(CurContext)) {
+ const FunctionDecl *FD = cast<FunctionDecl>(CurContext);
+ llvm::StringMap<bool> CallerFeatureMap;
+ Context.getFunctionFeatureMap(CallerFeatureMap, FD);
----------------
lukel97 wrote:
> > @4vtomat if the MCPU has a feature but the function explicitly disables it then I think we want the `-`
>
> Why don't we just remove it from feature map?
We also need the negative extensions if the target attribute string is a complete arch, e.g. `__attribute__((target="arch=rv64i")))`, because any extensions from mcpu need to be turned off.
https://github.com/llvm/llvm-project/pull/83674
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