[clang] [llvm] [RISC-V] Add CSR read/write builtins (PR #85091)

Wang Pengcheng via cfe-commits cfe-commits at lists.llvm.org
Thu Mar 14 22:33:25 PDT 2024


wangpc-pp wrote:

> Should we use strings like ARM does so we can get register by name?

Good point! We may provide two kinds of builtins: one by name, and another by CSR number.
We should continue @lenary's proposal and discuss it in https://github.com/riscv-non-isa/riscv-toolchain-conventions or https://github.com/riscv-non-isa/riscv-c-api-doc.

https://github.com/llvm/llvm-project/pull/85091


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