[clang] [llvm] [RISC-V] Add CSR read/write builtins (PR #85091)

[Craig Topper via cfe-commits]

topperc wrote:

> I support adding these builtins personally, but I think we need more discussions on the design. We can achieve the same thing via inline assemblies, that's true. But, from the compiler side, inline assemblies are kind of barriers, we can't do a lot of optimizations/reorderings if inline assemblies exist. If we make it a builtin, these limitations can be loosed I think.

Inline assembly is only a barrier to moving load/stores and other side effecting instructions. And only if the inline assembly is marked volatile or has "memory" clobber. It should not affect moving arithmetic. I think these CSR intrinsics would also need to be barriers against load/stores and other side effects to be the most conservative to access any CSR.

https://github.com/llvm/llvm-project/pull/85091