[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)

[Craig Topper via cfe-commits]

topperc wrote:

> Hi @topperc, can you add instruction alias for cflush and cdiscard instructions when the rs1 is X0 to `sf.cflush.d.l1` and `sf.cflush.d.l1` respectively, as this register is optional according to spec?

x0 has special meaning, but the spec never says it is "optional".

https://github.com/llvm/llvm-project/pull/83896