[clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)

[Xiang Li via cfe-commits]

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@@ -831,6 +831,40 @@ uint64_t3 reversebits(uint64_t3);
 _HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
 uint64_t4 reversebits(uint64_t4);
 
+//===----------------------------------------------------------------------===//
+// frac builtins
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python3kgae wrote:

round builtins here?

https://github.com/llvm/llvm-project/pull/83570