[clang] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo (PR #82152)

Kuba Mracek via cfe-commits cfe-commits at lists.llvm.org
Mon Feb 26 12:21:42 PST 2024


https://github.com/kubamracek updated https://github.com/llvm/llvm-project/pull/82152

>From 97e2f9c1c635310da19f89f44a8085c16c3feb94 Mon Sep 17 00:00:00 2001
From: Kuba Mracek <mracek at apple.com>
Date: Sat, 17 Feb 2024 22:26:21 -0800
Subject: [PATCH] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo

---
 clang/lib/CodeGen/Targets/RISCV.cpp     | 5 ++++-
 clang/test/CodeGenCXX/arm-swiftcall.cpp | 4 ++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp
index dec6540230a60f..9a79424c4612ce 100644
--- a/clang/lib/CodeGen/Targets/RISCV.cpp
+++ b/clang/lib/CodeGen/Targets/RISCV.cpp
@@ -529,7 +529,10 @@ class RISCVTargetCodeGenInfo : public TargetCodeGenInfo {
   RISCVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen,
                          unsigned FLen, bool EABI)
       : TargetCodeGenInfo(
-            std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {}
+            std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {
+    SwiftInfo =
+        std::make_unique<SwiftABIInfo>(CGT, /*SwiftErrorInRegister=*/false);
+  }
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
                            CodeGen::CodeGenModule &CGM) const override {
diff --git a/clang/test/CodeGenCXX/arm-swiftcall.cpp b/clang/test/CodeGenCXX/arm-swiftcall.cpp
index e60c1482700a4b..45eea7bfd853b9 100644
--- a/clang/test/CodeGenCXX/arm-swiftcall.cpp
+++ b/clang/test/CodeGenCXX/arm-swiftcall.cpp
@@ -1,5 +1,9 @@
 // RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -o - %s -Wno-return-type-c-linkage -std=c++03 | FileCheck %s -check-prefixes=CHECK
 
+// For now just check that the RISC-V triples are accepted, but don't check the IR, as swiftcall is not yet supported.
+// RUN: %clang_cc1 -triple riscv32-unknown-linux-gnu -emit-llvm -o - %s -Wno-return-type-c-linkage -std=c++03
+// RUN: %clang_cc1 -triple riscv64-unknown-linux-gnu -emit-llvm -o - %s -Wno-return-type-c-linkage -std=c++03
+
 // This isn't really testing anything ARM-specific; it's just a convenient
 // 32-bit platform.
 



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