[clang] [compiler-rt] [llvm] [X86] Support APXF to enable __builtin_cpu_supports. (PR #80636)
Freddy Ye via cfe-commits
cfe-commits at lists.llvm.org
Thu Feb 22 00:57:13 PST 2024
https://github.com/FreddyLeaf updated https://github.com/llvm/llvm-project/pull/80636
>From b131b0971d5c38a29c954b37c0da8fb3177e5c92 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 5 Feb 2024 14:07:29 +0800
Subject: [PATCH 1/5] [X86] Support APXF to enable __builtin_cpu_supports.
---
clang/test/CodeGen/target-builtin-noerror.c | 1 +
compiler-rt/lib/builtins/cpu_model/x86.c | 4 +++-
llvm/include/llvm/TargetParser/X86TargetParser.def | 3 ++-
llvm/lib/TargetParser/Host.cpp | 1 +
llvm/lib/TargetParser/X86TargetParser.cpp | 1 +
5 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/clang/test/CodeGen/target-builtin-noerror.c b/clang/test/CodeGen/target-builtin-noerror.c
index 9608b5f37baaae..b438e50848a4b6 100644
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -141,6 +141,7 @@ void verifyfeaturestrings(void) {
(void)__builtin_cpu_supports("sm3");
(void)__builtin_cpu_supports("sha512");
(void)__builtin_cpu_supports("sm4");
+ (void)__builtin_cpu_supports("apxf");
(void)__builtin_cpu_supports("usermsr");
(void)__builtin_cpu_supports("avx10.1-256");
(void)__builtin_cpu_supports("avx10.1-512");
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 1afa468c4ae8c1..35375c6e8d55b6 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -217,7 +217,7 @@ enum ProcessorFeatures {
FEATURE_SM3,
FEATURE_SHA512,
FEATURE_SM4,
- // FEATURE_APXF,
+ FEATURE_APXF,
FEATURE_USERMSR = 112,
FEATURE_AVX10_1_256,
FEATURE_AVX10_1_512,
@@ -983,6 +983,8 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
setFeature(FEATURE_USERMSR);
if (HasLeaf7Subleaf1 && ((EDX >> 19) & 1))
setFeature(FEATURE_AVX10_1_256);
+ if (HasLeaf7Subleaf1 && ((EDX >> 21) & 1))
+ setFeature(FEATURE_APXF);
unsigned MaxLevel;
getX86CpuIDAndInfo(0, &MaxLevel, &EBX, &ECX, &EDX);
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def
index 4c630c1eb06e8c..ec52062a2baacf 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.def
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.def
@@ -248,10 +248,11 @@ X86_FEATURE_COMPAT(AVXVNNIINT16, "avxvnniint16", 0)
X86_FEATURE_COMPAT(SM3, "sm3", 0)
X86_FEATURE_COMPAT(SHA512, "sha512", 0)
X86_FEATURE_COMPAT(SM4, "sm4", 0)
-X86_FEATURE (EGPR, "egpr")
+X86_FEATURE_COMPAT(APXF, "apxf", 0)
X86_FEATURE_COMPAT(USERMSR, "usermsr", 0)
X86_FEATURE_COMPAT(AVX10_1, "avx10.1-256", 0)
X86_FEATURE_COMPAT(AVX10_1_512, "avx10.1-512", 0)
+X86_FEATURE (EGPR, "egpr")
X86_FEATURE (EVEX512, "evex512")
X86_FEATURE (CF, "cf")
// These features aren't really CPU features, but the frontend can set them.
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index f1197c29655380..233ee12a000962 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
+ Features["apxf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
bool HasLeafD = MaxLevel >= 0xd &&
!getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index 21f46f576490a8..ea1f8517bb3329 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -633,6 +633,7 @@ constexpr FeatureBitset ImpliedFeaturesPPX = {};
constexpr FeatureBitset ImpliedFeaturesNDD = {};
constexpr FeatureBitset ImpliedFeaturesCCMP = {};
constexpr FeatureBitset ImpliedFeaturesCF = {};
+constexpr FeatureBitset ImpliedFeaturesAPXF = {};
constexpr FeatureInfo FeatureInfos[X86::CPU_FEATURE_MAX] = {
#define X86_FEATURE(ENUM, STR) {{"+" STR}, ImpliedFeatures##ENUM},
>From a1ecdf5fe54cb03045748e3d49f23e24e9428973 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 6 Feb 2024 17:19:28 +0800
Subject: [PATCH 2/5] misc
---
compiler-rt/lib/builtins/cpu_model/x86.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 35375c6e8d55b6..7e8acb3e73eda9 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -218,7 +218,7 @@ enum ProcessorFeatures {
FEATURE_SHA512,
FEATURE_SM4,
FEATURE_APXF,
- FEATURE_USERMSR = 112,
+ FEATURE_USERMSR,
FEATURE_AVX10_1_256,
FEATURE_AVX10_1_512,
CPU_FEATURE_MAX
>From 021c541bfee41de603368a98f0cbfbe7204d1a17 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 6 Feb 2024 17:24:40 +0800
Subject: [PATCH 3/5] cpuid.h
---
clang/lib/Headers/cpuid.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h
index 1ad6853a97c9d2..7fb7cbf0863454 100644
--- a/clang/lib/Headers/cpuid.h
+++ b/clang/lib/Headers/cpuid.h
@@ -212,6 +212,7 @@
#define bit_AVXVNNIINT8 0x00000010
#define bit_AVXNECONVERT 0x00000020
#define bit_PREFETCHI 0x00004000
+#define bit_APXF 0x00200000
/* Features in %eax for leaf 13 sub-leaf 1 */
#define bit_XSAVEOPT 0x00000001
>From fa42b33d62227bd88cc5d63431244d0caac1e286 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Thu, 22 Feb 2024 16:21:21 +0800
Subject: [PATCH 4/5] Utilize X86_MICROARCH_LEVEL
---
llvm/include/llvm/TargetParser/X86TargetParser.def | 4 ++--
llvm/lib/TargetParser/Host.cpp | 7 ++++++-
llvm/lib/TargetParser/X86TargetParser.cpp | 1 -
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def
index ec52062a2baacf..a9ed56fcd4700e 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.def
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.def
@@ -248,11 +248,10 @@ X86_FEATURE_COMPAT(AVXVNNIINT16, "avxvnniint16", 0)
X86_FEATURE_COMPAT(SM3, "sm3", 0)
X86_FEATURE_COMPAT(SHA512, "sha512", 0)
X86_FEATURE_COMPAT(SM4, "sm4", 0)
-X86_FEATURE_COMPAT(APXF, "apxf", 0)
+X86_FEATURE (EGPR, "egpr")
X86_FEATURE_COMPAT(USERMSR, "usermsr", 0)
X86_FEATURE_COMPAT(AVX10_1, "avx10.1-256", 0)
X86_FEATURE_COMPAT(AVX10_1_512, "avx10.1-512", 0)
-X86_FEATURE (EGPR, "egpr")
X86_FEATURE (EVEX512, "evex512")
X86_FEATURE (CF, "cf")
// These features aren't really CPU features, but the frontend can set them.
@@ -266,6 +265,7 @@ X86_MICROARCH_LEVEL(X86_64_BASELINE,"x86-64", 95)
X86_MICROARCH_LEVEL(X86_64_V2, "x86-64-v2", 96)
X86_MICROARCH_LEVEL(X86_64_V3, "x86-64-v3", 97)
X86_MICROARCH_LEVEL(X86_64_V4, "x86-64-v4", 98)
+X86_MICROARCH_LEVEL(APXF, "apxf", 111)
#undef X86_FEATURE_COMPAT
#undef X86_FEATURE
#undef X86_MICROARCH_LEVEL
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 233ee12a000962..b337a95b2c876a 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1845,7 +1845,12 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
- Features["apxf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["egpr"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["push2pop2"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["ppx"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["ndd"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["ccmp"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ Features["cf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
bool HasLeafD = MaxLevel >= 0xd &&
!getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index ea1f8517bb3329..21f46f576490a8 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -633,7 +633,6 @@ constexpr FeatureBitset ImpliedFeaturesPPX = {};
constexpr FeatureBitset ImpliedFeaturesNDD = {};
constexpr FeatureBitset ImpliedFeaturesCCMP = {};
constexpr FeatureBitset ImpliedFeaturesCF = {};
-constexpr FeatureBitset ImpliedFeaturesAPXF = {};
constexpr FeatureInfo FeatureInfos[X86::CPU_FEATURE_MAX] = {
#define X86_FEATURE(ENUM, STR) {{"+" STR}, ImpliedFeatures##ENUM},
>From fd73a2a447e90ae6d4270bfd9fc958343995138c Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Thu, 22 Feb 2024 16:56:58 +0800
Subject: [PATCH 5/5] Address comments.
---
llvm/lib/TargetParser/Host.cpp | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index b337a95b2c876a..f8c93fb35c685a 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1845,12 +1845,13 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
- Features["egpr"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
- Features["push2pop2"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
- Features["ppx"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
- Features["ndd"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
- Features["ccmp"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
- Features["cf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);
+ bool HasAPXF = HasLeaf7Subleaf1 && ((EDX >> 21) & 1)
+ Features["egpr"] = HasAPXF;
+ Features["push2pop2"] = HasAPXF;
+ Features["ppx"] = HasAPXF;
+ Features["ndd"] = HasAPXF;
+ Features["ccmp"] = HasAPXF;
+ Features["cf"] = HasAPXF;
bool HasLeafD = MaxLevel >= 0xd &&
!getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
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