[clang] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo (PR #82152)
Kuba Mracek via cfe-commits
cfe-commits at lists.llvm.org
Sat Feb 17 22:33:06 PST 2024
https://github.com/kubamracek created https://github.com/llvm/llvm-project/pull/82152
For Embedded Swift, let's unblock building for RISC-V boards (e.g. ESP32-C6). This isn't trying to add full RISC-V support to Swift / Embedded Swift, it's just fixing the immediate blocker (not having SwiftInfo defined blocks all compilations).
>From b8e8c6e2531db93fb2a4cd08149c9204cb997d53 Mon Sep 17 00:00:00 2001
From: Kuba Mracek <mracek at apple.com>
Date: Sat, 17 Feb 2024 22:26:21 -0800
Subject: [PATCH] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo
---
clang/lib/CodeGen/Targets/RISCV.cpp | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp
index dec6540230a60f..9a79424c4612ce 100644
--- a/clang/lib/CodeGen/Targets/RISCV.cpp
+++ b/clang/lib/CodeGen/Targets/RISCV.cpp
@@ -529,7 +529,10 @@ class RISCVTargetCodeGenInfo : public TargetCodeGenInfo {
RISCVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen,
unsigned FLen, bool EABI)
: TargetCodeGenInfo(
- std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {}
+ std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {
+ SwiftInfo =
+ std::make_unique<SwiftABIInfo>(CGT, /*SwiftErrorInRegister=*/false);
+ }
void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule &CGM) const override {
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