[clang] 9f2d8cd - [flang][clang][docs] Split out Clang specific doc text for -mrvv-vector-bits

[David Spickett via cfe-commits]

Author: David Spickett
Date: 2024-02-15T11:49:59Z
New Revision: 9f2d8cdf4209638973a0611fa2efd4e2fe38bfa5

URL: https://github.com/llvm/llvm-project/commit/9f2d8cdf4209638973a0611fa2efd4e2fe38bfa5
DIFF: https://github.com/llvm/llvm-project/commit/9f2d8cdf4209638973a0611fa2efd4e2fe38bfa5.diff

LOG: [flang][clang][docs] Split out Clang specific doc text for -mrvv-vector-bits

Flang does not set the preprocessor define.

Added: 
    

Modified: 
    clang/include/clang/Driver/Options.td

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 63ca8534c2a2a3..53f23f9abb4c96 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -4660,11 +4660,15 @@ def menable_experimental_extensions : Flag<["-"], "menable-experimental-extensio
 def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>,
   Visibility<[ClangOption, FlangOption]>,
   HelpText<"Specify the size in bits of an RVV vector register">,
-  DocBrief<"Defaults to the vector length agnostic value of \"scalable\". "
-           "Accepts power of 2 values between 64 and 65536. Also accepts "
-           "\"zvl\" to use the value implied by -march/-mcpu. On Clang, value "
-           "will be reflected in __riscv_v_fixed_vlen preprocessor define "
-           "(RISC-V only)">;
+  DocBrief<!strconcat(
+    "Defaults to the vector length agnostic value of \"scalable\". "
+    "Accepts power of 2 values between 64 and 65536. Also accepts "
+    "\"zvl\" to use the value implied by -march/-mcpu.",
+    !cond(
+      // Flang does not set the preprocessor define.
+      !eq(GlobalDocumentation.Program, "Flang") : "",
+      true: " The value will be reflected in __riscv_v_fixed_vlen preprocessor define"),
+    " (RISC-V only)")>;
 
 def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_Group>,
   HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64/LoongArch/RISC-V only)">;