[clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)

[Tony Tye via cfe-commits]

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@@ -605,12 +606,197 @@ class SIGfx12CacheControl : public SIGfx11CacheControl {
                                       bool IsNonTemporal) const override;
 };
 
+class SIPreciseMemorySupport {
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t-tye wrote:

My initial thought had been that this would be part of the existing cache control functions. It seems it is the same kind of waitcnt as needs to be inserted after a store release. That also requires the right waitcnt to be generated according to the kind of memory instruction.

https://github.com/llvm/llvm-project/pull/79236