[llvm] [clang] [clang-tools-extra] [XCOFF] Add compiler version to an auxiliary symbol table entry (PR #80162)
via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 6 07:08:16 PST 2024
https://github.com/stephenpeckham updated https://github.com/llvm/llvm-project/pull/80162
>From b7ff06c3ad70bee591cf5f71d17a7837bb411a16 Mon Sep 17 00:00:00 2001
From: Stephen Peckham <speckham at us.ibm.com>
Date: Wed, 31 Jan 2024 11:36:15 -0500
Subject: [PATCH 1/2] [XCOFF] Add compiler version to an auxiliary symbol table
entry for any C_FILE symbols. To match the behavior of the assembler and the
legacy compiler, this includes using the generic ".file" name for the C_FILE
symbol and generating the actual file name in an auxiliary entry.
---
llvm/include/llvm/BinaryFormat/XCOFF.h | 1 +
llvm/include/llvm/MC/MCAssembler.h | 11 +
llvm/lib/MC/MCAsmStreamer.cpp | 25 ++-
llvm/lib/MC/MCObjectStreamer.cpp | 5 +-
llvm/lib/MC/XCOFFObjectWriter.cpp | 75 ++++++-
.../CodeGen/PowerPC/aix-alias-alignment-2.ll | 2 +-
.../CodeGen/PowerPC/aix-alias-alignment.ll | 2 +-
.../aix-available-externally-linkage-fun.ll | 8 +-
llvm/test/CodeGen/PowerPC/aix-extern-weak.ll | 7 +-
llvm/test/CodeGen/PowerPC/aix-extern.ll | 7 +-
llvm/test/CodeGen/PowerPC/aix-filename-c.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-filename-f.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll | 14 +-
.../CodeGen/PowerPC/aix-llvm-intrinsic.ll | 28 +--
llvm/test/CodeGen/PowerPC/aix-overflow-toc.py | 16 +-
.../test/CodeGen/PowerPC/aix-relro-section.ll | 24 +--
.../aix-small-local-exec-tls-largeaccess.ll | 48 ++---
.../CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll | 190 +++++++++--------
.../PowerPC/aix-tls-le-xcoff-reloc-large.ll | 122 +++++------
.../PowerPC/aix-tls-le-xcoff-reloc-large32.ll | 136 ++++++------
.../CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll | 108 +++++-----
.../PowerPC/aix-tls-le-xcoff-reloc32.ll | 122 +++++------
.../PowerPC/aix-tls-xcoff-reloc-large.ll | 198 +++++++++---------
.../CodeGen/PowerPC/aix-tls-xcoff-reloc.ll | 193 +++++++++--------
.../PowerPC/aix-tls-xcoff-variables.ll | 67 +++---
.../PowerPC/aix-user-defined-memcpy.ll | 22 +-
llvm/test/CodeGen/PowerPC/aix-weak.ll | 7 +-
llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll | 2 +-
.../PowerPC/aix-xcoff-data-sections.ll | 30 +--
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll | 22 +-
.../aix-xcoff-exception-section-debug.ll | 8 +-
.../PowerPC/aix-xcoff-exception-section.ll | 16 +-
.../PowerPC/aix-xcoff-explicit-section.ll | 14 +-
.../CodeGen/PowerPC/aix-xcoff-funcsect.ll | 156 +++++++-------
llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll | 2 +-
.../CodeGen/PowerPC/aix-xcoff-reloc-large.ll | 2 +-
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 46 ++--
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll | 2 +-
.../PowerPC/aix-xcoff-symbol-rename.ll | 46 ++--
.../CodeGen/PowerPC/basic-toc-data-def.ll | 22 +-
.../CodeGen/PowerPC/basic-toc-data-extern.ll | 32 +--
...iltins-ppc-xlcompat-trap-annotations-td.ll | 2 +-
...iltins-ppc-xlcompat-trap-annotations-tw.ll | 2 +-
.../test/CodeGen/PowerPC/pgo-ref-directive.ll | 2 +-
llvm/test/CodeGen/PowerPC/toc-data-const.ll | 56 ++---
llvm/test/MC/PowerPC/aix-file-symbols.s | 16 +-
.../llvm-objdump/XCOFF/symbol-table.test | 46 ++--
48 files changed, 1041 insertions(+), 930 deletions(-)
diff --git a/llvm/include/llvm/BinaryFormat/XCOFF.h b/llvm/include/llvm/BinaryFormat/XCOFF.h
index 19d44a5ac57f1..bbcd8a4f29ae9 100644
--- a/llvm/include/llvm/BinaryFormat/XCOFF.h
+++ b/llvm/include/llvm/BinaryFormat/XCOFF.h
@@ -27,6 +27,7 @@ namespace XCOFF {
constexpr size_t FileNamePadSize = 6;
constexpr size_t NameSize = 8;
+constexpr size_t AuxFileEntNameSize = 14;
constexpr size_t FileHeaderSize32 = 20;
constexpr size_t FileHeaderSize64 = 24;
constexpr size_t AuxFileHeaderSize32 = 72;
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index 5ae5f6d709385..4e0c627808605 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -133,6 +133,8 @@ class MCAssembler {
/// List of declared file names
std::vector<std::pair<std::string, size_t>> FileNames;
+ // Optional compiler version.
+ std::string CompilerVersion;
MCDwarfLineTableParams LTParams;
@@ -486,6 +488,15 @@ class MCAssembler {
FileNames.emplace_back(std::string(FileName), Symbols.size());
}
+ bool setCompilerVersion(std::string CompilerVers) {
+ if (CompilerVersion.empty()) {
+ CompilerVersion = CompilerVers;
+ return true;
+ }
+ return false;
+ }
+ StringRef getCompilerVersion() { return CompilerVersion; }
+
/// Write the necessary bundle padding to \p OS.
/// Expects a fragment \p F containing instructions and its size \p FSize.
void writeFragmentPadding(raw_ostream &OS, const MCEncodedFragment &F,
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 49668de27d67e..14a499f045edc 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -1590,17 +1590,22 @@ void MCAsmStreamer::emitFileDirective(StringRef Filename,
assert(MAI->hasFourStringsDotFile());
OS << "\t.file\t";
PrintQuotedString(Filename, OS);
- OS << ",";
- if (!CompilerVerion.empty()) {
- PrintQuotedString(CompilerVerion, OS);
- }
- if (!TimeStamp.empty()) {
- OS << ",";
- PrintQuotedString(TimeStamp, OS);
- }
- if (!Description.empty()) {
+ bool useTimeStamp = !TimeStamp.empty();
+ bool useCompilerVersion = !CompilerVerion.empty();
+ bool useDescription = !Description.empty();
+ if (useTimeStamp || useCompilerVersion || useDescription) {
OS << ",";
- PrintQuotedString(Description, OS);
+ if (useTimeStamp)
+ PrintQuotedString(TimeStamp, OS);
+ if (useCompilerVersion || useDescription) {
+ OS << ",";
+ if (useCompilerVersion)
+ PrintQuotedString(CompilerVerion, OS);
+ if (useDescription) {
+ OS << ",";
+ PrintQuotedString(Description, OS);
+ }
+ }
}
EmitEOL();
}
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index d11ccfb5e269f..cf53ac2d04102 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -902,7 +902,10 @@ void MCObjectStreamer::emitFileDirective(StringRef Filename,
StringRef TimeStamp,
StringRef Description) {
getAssembler().addFileName(Filename);
- // TODO: add additional info to integrated assembler.
+ if (!CompilerVerion.empty())
+ getAssembler().setCompilerVersion(CompilerVerion.data());
+ // TODO: add TimeStamp and Description to .file symbol table entry
+ // with the integrated assembler.
}
void MCObjectStreamer::emitAddrsig() {
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index 343e2fc877bc3..ecdba0a284b9c 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -361,6 +361,8 @@ class XCOFFObjectWriter : public MCObjectWriter {
bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
bool nameShouldBeInStringTable(const StringRef &);
void writeSymbolName(const StringRef &);
+ bool auxFileSymNameShouldBeInStringTable(const StringRef &);
+ void writeAuxFileSymName(const StringRef &);
void writeSymbolEntryForCsectMemberLabel(const Symbol &SymbolRef,
const XCOFFSection &CSectionRef,
@@ -391,7 +393,8 @@ class XCOFFObjectWriter : public MCObjectWriter {
const MCAsmLayout &Layout,
CInfoSymSectionEntry &CInfoSymEntry,
uint64_t &CurrentAddressLocation);
- void writeSymbolTable(const MCAsmLayout &Layout);
+ void writeSymbolTable(MCAssembler &Asm, const MCAsmLayout &Layout);
+ void writeSymbolAuxFileEntry(StringRef &Name, uint8_t ftype);
void writeSymbolAuxDwarfEntry(uint64_t LengthOfSectionPortion,
uint64_t NumberOfRelocEnt = 0);
void writeSymbolAuxCsectEntry(uint64_t SectionOrLength,
@@ -416,7 +419,7 @@ class XCOFFObjectWriter : public MCObjectWriter {
// *) Assigns symbol table indices.
// *) Builds up the section header table by adding any non-empty sections to
// `Sections`.
- void assignAddressesAndIndices(const MCAsmLayout &);
+ void assignAddressesAndIndices(MCAssembler &Asm, const MCAsmLayout &);
// Called after relocations are recorded.
void finalizeSectionInfo();
void finalizeRelocationInfo(SectionEntry *Sec, uint64_t RelCount);
@@ -634,12 +637,20 @@ void XCOFFObjectWriter::executePostLayoutBinding(MCAssembler &Asm,
if (FileNames.empty())
FileNames.emplace_back(".file", 0);
for (const std::pair<std::string, size_t> &F : FileNames) {
- if (nameShouldBeInStringTable(F.first))
+ if (auxFileSymNameShouldBeInStringTable(F.first))
Strings.add(F.first);
}
+ // Always add ".file" to the symbol table. The actual file name will be in
+ // the AUX_FILE auxiliary entry.
+ if (nameShouldBeInStringTable(".file"))
+ Strings.add(".file");
+ StringRef Vers = Asm.getCompilerVersion();
+ if (auxFileSymNameShouldBeInStringTable(Vers))
+ Strings.add(Vers);
+
Strings.finalize();
- assignAddressesAndIndices(Layout);
+ assignAddressesAndIndices(Asm, Layout);
}
void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
@@ -812,7 +823,7 @@ uint64_t XCOFFObjectWriter::writeObject(MCAssembler &Asm,
writeSectionHeaderTable();
writeSections(Asm, Layout);
writeRelocations();
- writeSymbolTable(Layout);
+ writeSymbolTable(Asm, Layout);
// Write the string table.
Strings.write(W.OS);
@@ -872,6 +883,36 @@ void XCOFFObjectWriter::writeSymbolAuxCsectEntry(uint64_t SectionOrLength,
}
}
+bool XCOFFObjectWriter::auxFileSymNameShouldBeInStringTable(
+ const StringRef &SymbolName) {
+ return SymbolName.size() > XCOFF::AuxFileEntNameSize;
+}
+
+void XCOFFObjectWriter::writeAuxFileSymName(const StringRef &SymbolName) {
+ // Magic, Offset or SymbolName.
+ if (auxFileSymNameShouldBeInStringTable(SymbolName)) {
+ W.write<int32_t>(0);
+ W.write<uint32_t>(Strings.getOffset(SymbolName));
+ W.OS.write_zeros(XCOFF::FileNamePadSize);
+ } else {
+ char Name[XCOFF::AuxFileEntNameSize + 1];
+ std::strncpy(Name, SymbolName.data(), XCOFF::AuxFileEntNameSize);
+ ArrayRef<char> NameRef(Name, XCOFF::AuxFileEntNameSize);
+ W.write(NameRef);
+ }
+}
+
+void XCOFFObjectWriter::writeSymbolAuxFileEntry(StringRef &Name,
+ uint8_t ftype) {
+ writeAuxFileSymName(Name);
+ W.write<uint8_t>(ftype);
+ W.OS.write_zeros(2);
+ if (is64Bit())
+ W.write<uint8_t>(XCOFF::AUX_FILE);
+ else
+ W.OS.write_zeros(1);
+}
+
void XCOFFObjectWriter::writeSymbolAuxDwarfEntry(
uint64_t LengthOfSectionPortion, uint64_t NumberOfRelocEnt) {
writeWord(LengthOfSectionPortion);
@@ -1103,8 +1144,11 @@ void XCOFFObjectWriter::writeRelocations() {
writeRelocation(Reloc, *DwarfSection.DwarfSect);
}
-void XCOFFObjectWriter::writeSymbolTable(const MCAsmLayout &Layout) {
+void XCOFFObjectWriter::writeSymbolTable(MCAssembler &Asm,
+ const MCAsmLayout &Layout) {
// Write C_FILE symbols.
+ StringRef Vers = Asm.getCompilerVersion();
+
for (const std::pair<std::string, size_t> &F : FileNames) {
// The n_name of a C_FILE symbol is the source file's name when no auxiliary
// entries are present.
@@ -1133,9 +1177,15 @@ void XCOFFObjectWriter::writeSymbolTable(const MCAsmLayout &Layout) {
else
CpuID = XCOFF::TCPU_COM;
- writeSymbolEntry(FileName, /*Value=*/0, XCOFF::ReservedSectionNum::N_DEBUG,
+ int NumberOfFileAuxEntries = 1;
+ if (!Vers.empty())
+ ++NumberOfFileAuxEntries;
+ writeSymbolEntry(".file", /*Value=*/0, XCOFF::ReservedSectionNum::N_DEBUG,
/*SymbolType=*/(LangID << 8) | CpuID, XCOFF::C_FILE,
- /*NumberOfAuxEntries=*/0);
+ NumberOfFileAuxEntries);
+ writeSymbolAuxFileEntry(FileName, XCOFF::XFT_FN);
+ if (!Vers.empty())
+ writeSymbolAuxFileEntry(Vers, XCOFF::XFT_CV);
}
if (CInfoSymSection.Entry)
@@ -1351,9 +1401,12 @@ void XCOFFObjectWriter::addCInfoSymEntry(StringRef Name, StringRef Metadata) {
std::make_unique<CInfoSymInfo>(Name.str(), Metadata.str()));
}
-void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
- // The symbol table starts with all the C_FILE symbols.
- uint32_t SymbolTableIndex = FileNames.size();
+void XCOFFObjectWriter::assignAddressesAndIndices(MCAssembler &Asm,
+ const MCAsmLayout &Layout) {
+ // The symbol table starts with all the C_FILE symbols. Each C_FILE symbol
+ // requires 1 or 2 auxiliary entries.
+ uint32_t SymbolTableIndex =
+ (2 + (Asm.getCompilerVersion().empty() ? 0 : 1)) * FileNames.size();
if (CInfoSymSection.Entry)
SymbolTableIndex++;
diff --git a/llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll b/llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
index 209f0e9c38385..cac616fa40371 100644
--- a/llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
@@ -58,7 +58,7 @@ define void @foo3(%struct.B %a1) {
; ASM-NEXT: .vbyte 4, 34
; SYM: SYMBOL TABLE:
-; SYM-NEXT: 00000000 df *DEBUG* 00000000 <stdin>
+; SYM-NEXT: 00000000 df *DEBUG* 00000000 .file
; SYM-NEXT: 00000000 l .text 0000008a
; SYM-NEXT: 00000000 g F .text (csect: ) 00000000 .foo1
; SYM-NEXT: 00000030 g F .text (csect: ) 00000000 .foo2
diff --git a/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll b/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
index a1ad80481adf1..1049206003767 100644
--- a/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
@@ -61,7 +61,7 @@ define void @foo(i32 %a1, i32 %a2, i32 %a3) {
; OBJ-NEXT: c: 4e 80 00 20 blr
; SYM: SYMBOL TABLE:
-; SYM-NEXT: 00000000 df *DEBUG* 00000000 <stdin>
+; SYM-NEXT: 00000000 df *DEBUG* 00000000 .file
; SYM-NEXT: 00000000 l .text 00000029
; SYM-NEXT: 00000000 g F .text (csect: ) 00000000 .foo
; SYM-NEXT: 0000002c l .data 00000008 .data
diff --git a/llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll b/llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
index f87184f7b4bf4..0ad229004b8a3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
@@ -6,11 +6,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=OBJ %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck -D#NFA=2 --check-prefix=OBJ %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefix=OBJ %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck -D#NFA=2 --check-prefix=OBJ %s
define available_externally i32 @foo(i32 %a) {
entry:
@@ -27,7 +27,7 @@ entry:
; OBJ-NEXT: StorageClass: C_EXT (0x2)
; OBJ-NEXT: NumberOfAuxEntries: 1
; OBJ-NEXT: CSECT Auxiliary Entry {
-; OBJ-NEXT: Index: 2
+; OBJ-NEXT: Index: [[#NFA+2]]
; OBJ-NEXT: SectionLen: 0
; OBJ-NEXT: ParameterHashIndex: 0x0
; OBJ-NEXT: TypeChkSectNum: 0x0
@@ -42,7 +42,7 @@ entry:
; OBJ-NEXT: StorageClass: C_EXT (0x2)
; OBJ-NEXT: NumberOfAuxEntries: 1
; OBJ-NEXT: CSECT Auxiliary Entry {
-; OBJ-NEXT: Index: 4
+; OBJ-NEXT: Index: [[#NFA+4]]
; OBJ-NEXT: SectionLen: 0
; OBJ-NEXT: ParameterHashIndex: 0x0
; OBJ-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index 11b6827c33b1e..ea61fdb022b5c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -65,16 +65,15 @@ declare extern_weak void @foo_ext_weak(ptr)
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: 0
-; CHECKSYM-NEXT: Name: <stdin>
+; CHECKSYM-NEXT: Name: .file
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
-; CHECKSYM-NEXT: NumberOfAuxEntries: 0
-; CHECKSYM-NEXT: }
-; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: NumberOfAuxEntries: 2
+; CHECKSYM: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name: .foo_ext_weak
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index 905e458473905..b4366dddedb2f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -88,16 +88,15 @@ declare i32 @bar_extern(ptr)
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: 0
-; CHECKSYM-NEXT: Name: <stdin>
+; CHECKSYM-NEXT: Name: .file
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
-; CHECKSYM-NEXT: NumberOfAuxEntries: 0
-; CHECKSYM-NEXT: }
-; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: NumberOfAuxEntries: 2
+; CHECKSYM: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name: .bar_extern
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
index 2adc51cc2aecc..c4202a0c58cee 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
@@ -5,7 +5,8 @@
source_filename = "1.c"
-; OBJ: Name: 1.c
+; OBJ: Name: .file
; OBJ: Source Language ID: TB_C (0x0)
; OBJ32: CPU Version ID: TCPU_COM (0x3)
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: Name: 1.c
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
index 22496be1dfc88..802281b6c1eaa 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
@@ -5,7 +5,8 @@
source_filename = "1.cpp"
-; OBJ: Name: 1.cpp
+; OBJ: Name: .file
; OBJ: Source Language ID: TB_CPLUSPLUS (0x9)
; OBJ32: CPU Version ID: TCPU_COM (0x3)
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: Name: 1.cpp
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
index 914c4facc3cf5..99036bde702d6 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
@@ -5,7 +5,8 @@
source_filename = "1.f95"
-; OBJ: Name: 1.f95
+; OBJ: Name: .file
; OBJ: Source Language ID: TB_Fortran (0x1)
; OBJ32: CPU Version ID: TCPU_COM (0x3)
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: Name: 1.f95
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
index 23fb51e944424..4cca1b4d6f7ba 100644
--- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
@@ -13,13 +13,23 @@ entry:
; CHECK-NEXT: AddressSize: 32bit
; CHECK: Symbol {
; CHECK-NEXT: Index: 0
-; CHECK-NEXT: Name: <stdin>
+; CHECK-NEXT: Name: .file
; CHECK-NEXT: Value (SymbolTableIndex): 0x0
; CHECK-NEXT: Section: N_DEBUG
; CHECK-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; CHECK-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECK-NEXT: StorageClass: C_FILE (0x67)
-; CHECK-NEXT: NumberOfAuxEntries: 0
+; CHECK-NEXT: NumberOfAuxEntries: 2
+; CHECK-NEXT: File Auxiliary Entry {
+; CHECK-NEXT: Index: 1
+; CHECK-NEXT: Name:
+; CHECK-NEXT: Type: XFT_FN (0x0)
+; CHECK-NEXT: }
+; CHECK-NEXT: File Auxiliary Entry {
+; CHECK-NEXT: Index: 2
+; CHECK-NEXT: Name: LLVM
+; CHECK-NEXT: Type: XFT_CV (0x2)
+; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: Symbol {
; CHECK-NEXT: Index: [[#Index:]]
diff --git a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
index 09aec55a5b3df..50677f36e3f7a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
@@ -7,12 +7,12 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=CHECKSYM,CHECKSYM32 %s
-; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck --check-prefixes=CHECKRELOC,CHECKRELOC32 %s
+; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefixes=CHECKRELOC,CHECKRELOC32 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t64.o < %s
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=CHECKSYM,CHECKSYM64 %s
-; RUN: llvm-objdump -r -d --symbol-description %t64.o | FileCheck --check-prefixes=CHECKRELOC,CHECKRELOC64 %s
+; RUN: llvm-objdump -r -d --symbol-description %t64.o | FileCheck -D#NFA=2 --check-prefixes=CHECKRELOC,CHECKRELOC64 %s
%struct.S = type { i32, i32 }
@@ -40,17 +40,17 @@ declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM: Symbol {
; CHECKSYM-NEXT: Index: 0
-; CHECKSYM-NEXT: Name: <stdin>
+; CHECKSYM-NEXT: Name: .file
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
-; CHECKSYM-NEXT: NumberOfAuxEntries: 0
-; CHECKSYM-NEXT: }
-; CHECKSYM-NEXT: Symbol {
-; CHECKSYM-NEXT: Index: 1
+; CHECKSYM-NEXT: NumberOfAuxEntries: 2
+; CHECKSYM: }
+; CHECKSYM: Symbol {
+; CHECKSYM: Index: 3
; CHECKSYM32-NEXT: Name: .___memset
; CHECKSYM64-NEXT: Name: .___memset64
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
@@ -59,7 +59,7 @@ declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: StorageClass: C_EXT (0x2)
; CHECKSYM-NEXT: NumberOfAuxEntries: 1
; CHECKSYM-NEXT: CSECT Auxiliary Entry {
-; CHECKSYM-NEXT: Index: 2
+; CHECKSYM-NEXT: Index: 4
; CHECKSYM-NEXT: SectionLen: 0
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
@@ -72,19 +72,19 @@ declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: }
; CHECKSYM-NEXT: }
-; CHECKRELOC32: 00000000 (idx: 7) .bar:
-; CHECKRELOC64: 0000000000000000 (idx: 7) .bar:
+; CHECKRELOC32: 00000000 (idx: [[#NFA+7]]) .bar:
+; CHECKRELOC64: 0000000000000000 (idx: [[#NFA+7]]) .bar:
; CHECKRELOC-NEXT: 0: 7c 08 02 a6 mflr 0
; CHECKRELOC32-NEXT: 4: 94 21 ff c0 stwu 1, -64(1)
; CHECKRELOC32-NEXT: 8: 80 62 00 00 lwz 3, 0(2)
-; CHECKRELOC32-NEXT: 0000000a: R_TOC (idx: 13) s[TC]
+; CHECKRELOC32-NEXT: 0000000a: R_TOC (idx: [[#NFA+13]]) s[TC]
; CHECKRELOC32-NEXT: c: 90 01 00 48 stw 0, 72(1)
; CHECKRELOC64-NEXT: 4: f8 21 ff 91 stdu 1, -112(1)
; CHECKRELOC64-NEXT: 8: e8 62 00 00 ld 3, 0(2)
-; CHECKRELOC64-NEXT: 000000000000000a: R_TOC (idx: 13) s[TC]
+; CHECKRELOC64-NEXT: 000000000000000a: R_TOC (idx: [[#NFA+13]]) s[TC]
; CHECKRELOC64-NEXT: c: f8 01 00 80 std 0, 128(1)
; CHECKRELOC-NEXT: 10: 80 83 00 04 lwz 4, 4(3)
; CHECKRELOC-NEXT: 14: 7c 85 23 78 mr 5, 4
; CHECKRELOC-NEXT: 18: 4b ff ff e9 bl 0x0
-; CHECKRELOC32-NEXT: 00000018: R_RBR (idx: 1) .___memset[PR]
-; CHECKRELOC64-NEXT: 0000000000000018: R_RBR (idx: 1) .___memset64[PR]
+; CHECKRELOC32-NEXT: 00000018: R_RBR (idx: [[#NFA+1]]) .___memset[PR]
+; CHECKRELOC64-NEXT: 0000000000000018: R_RBR (idx: [[#NFA+1]]) .___memset64[PR]
diff --git a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
index a5fbb81b8d9ef..84438c3552e5c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
+++ b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
@@ -9,7 +9,7 @@
# RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small -data-sections=false -mcpu=pwr4 -mattr=-altivec -O0 \
# RUN: -filetype=obj -o %t.o < %t.ll
-# RUN: llvm-objdump --no-print-imm-hex -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS32 %s
+# RUN: llvm-objdump --no-print-imm-hex -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS32 %s
## FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
@@ -48,18 +48,18 @@
# ASM64: ld 4, L..C12289-131072(2) # @a12289
# DIS32: 0: 80 82 00 00 lwz 4, 0(2)
-# DIS32: 00000002: R_TOC (idx: 24591) a0[TC]
+# DIS32: 00000002: R_TOC (idx: [[#NFA+24591]]) a0[TC]
# DIS32: c: 80 82 00 04 lwz 4, 4(2)
-# DIS32: 0000000e: R_TOC (idx: 24593) a1[TC]
+# DIS32: 0000000e: R_TOC (idx: [[#NFA+24593]]) a1[TC]
# DIS32: fffc: 80 82 7f fc lwz 4, 32764(2)
-# DIS32: 0000fffe: R_TOC (idx: 40973) a8191[TC]
+# DIS32: 0000fffe: R_TOC (idx: [[#NFA+40973]]) a8191[TC]
# DIS32: 10004: 80 82 80 00 lwz 4, -32768(2)
-# DIS32: 00010006: R_TOC (idx: 40975) a8192[TC]
+# DIS32: 00010006: R_TOC (idx: [[#NFA+40975]]) a8192[TC]
# DIS32: 1000c: 80 82 80 04 lwz 4, -32764(2)
-# DIS32: 0001000e: R_TOC (idx: 40977) a8193[TC]
+# DIS32: 0001000e: R_TOC (idx: [[#NFA+40977]]) a8193[TC]
# DIS32: 18004: 80 82 c0 00 lwz 4, -16384(2)
-# DIS32: 00018006: R_TOC (idx: 49167) a12288[TC]
+# DIS32: 00018006: R_TOC (idx: [[#NFA+49167]]) a12288[TC]
# DIS32: 1800c: 80 82 c0 04 lwz 4, -16380(2)
-# DIS32: 0001800e: R_TOC (idx: 49169) a12289[TC]
+# DIS32: 0001800e: R_TOC (idx: [[#NFA+49169]]) a12289[TC]
diff --git a/llvm/test/CodeGen/PowerPC/aix-relro-section.ll b/llvm/test/CodeGen/PowerPC/aix-relro-section.ll
index 25be1f0e16f37..5da99191f3d07 100644
--- a/llvm/test/CodeGen/PowerPC/aix-relro-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-relro-section.ll
@@ -4,10 +4,10 @@
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mxcoff-roptr < %s | FileCheck %s --check-prefix CHECK-RO
; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
-; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s --check-prefix=OBJ32
+; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ32
; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
-; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s --check-prefix=OBJ64
+; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ64
@var = external constant i32
@ptr = private constant ptr @var, section "relro-section"
@@ -20,11 +20,11 @@
; OBJ32: Relocations [
; OBJ32-NEXT: Section (index: 2) .data {
-; OBJ32-NEXT: 0x0 R_POS var(1) 0x1F
+; OBJ32-NEXT: 0x0 R_POS var([[#NFA+1]]) 0x1F
; OBJ32-NEXT: }
; OBJ32-NEXT: ]
; OBJ32-NEXT: Symbols [
-; OBJ32: Index: 1
+; OBJ32: Index: [[#NFA+1]]
; OBJ32-NEXT: Name: var
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: N_UNDEF
@@ -32,7 +32,7 @@
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 2
+; OBJ32-NEXT: Index: [[#NFA+2]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -42,7 +42,7 @@
; OBJ32-NEXT: StabInfoIndex: 0x0
; OBJ32-NEXT: StabSectNum: 0x0
; OBJ32-NEXT: }
-; OBJ32: Index: 5
+; OBJ32: Index: [[#NFA+5]]
; OBJ32-NEXT: Name: relro-section
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: .data
@@ -50,7 +50,7 @@
; OBJ32-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 6
+; OBJ32-NEXT: Index: [[#NFA+6]]
; OBJ32-NEXT: SectionLen: 4
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -64,11 +64,11 @@
; OBJ64: Relocations [
; OBJ64-NEXT: Section (index: 2) .data {
-; OBJ64-NEXT: 0x0 R_POS var(1) 0x3F
+; OBJ64-NEXT: 0x0 R_POS var([[#NFA+1]]) 0x3F
; OBJ64-NEXT: }
; OBJ64-NEXT: ]
; OBJ64-NEXT: Symbols [
-; OBJ64: Index: 1
+; OBJ64: Index: [[#NFA+1]]
; OBJ64-NEXT: Name: var
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: N_UNDEF
@@ -76,7 +76,7 @@
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 2
+; OBJ64-NEXT: Index: [[#NFA+2]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
@@ -85,7 +85,7 @@
; OBJ64-NEXT: StorageMappingClass: XMC_UA (0x4)
; OBJ64-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; OBJ64-NEXT: }
-; OBJ64: Index: 5
+; OBJ64: Index: [[#NFA+5]]
; OBJ64-NEXT: Name: relro-section
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: .data
@@ -93,7 +93,7 @@
; OBJ64-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 6
+; OBJ64-NEXT: Index: [[#NFA+6]]
; OBJ64-NEXT: SectionLen: 8
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
index 55c69839515c4..a502de87410f8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
@@ -11,7 +11,7 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+aix-small-local-exec-tls \
; RUN: -mtriple powerpc64-ibm-aix-xcoff -xcoff-traceback-table=false \
; RUN: --code-model=large -filetype=obj -o %t.o < %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@mySmallLocalExecTLSv1 = thread_local(localexec) global [8187 x i32] zeroinitializer, align 4
@mySmallLocalExecTLS2 = thread_local(localexec) global [4000 x i32] zeroinitializer, align 4
@@ -170,56 +170,56 @@ entry:
ret i32 %add15
}
-; DIS: {{.*}}aix-small-local-exec-tls-largeaccess.ll.tmp.o: file format aix5coff64-rs6000
+; DIS: file format aix5coff64-rs6000
; DIS: Disassembly of section .text:
-; DIS: 0000000000000000 (idx: 3) .StoreArrays1:
+; DIS: 0000000000000000 (idx: [[#NFA+3]]) .StoreArrays1:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 15) mySmallLocalExecTLSv1[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+15]]) mySmallLocalExecTLSv1[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 5, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 4, 0(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 15) mySmallLocalExecTLSv1[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+15]]) mySmallLocalExecTLSv1[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 4, 13, 32748
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 17) mySmallLocalExecTLS2[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+17]]) mySmallLocalExecTLS2[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 24(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 2
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 3, 320(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, -16788
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 19) mySmallLocalExecTLS3[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+19]]) mySmallLocalExecTLS3[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 4, 324(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, -788
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 21) mySmallLocalExecTLS4[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+21]]) mySmallLocalExecTLS4[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 88
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 328(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, 15212
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 23) mySmallLocalExecTLS5[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+23]]) mySmallLocalExecTLS5[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 4, 332(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 102
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
-; DIS: 0000000000000050 (idx: 5) .StoreArrays2:
+; DIS: 0000000000000050 (idx: [[#NFA+5]]) .StoreArrays2:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 13) mySmallLocalExecTLSv2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+13]]) mySmallLocalExecTLSv2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 5, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 13) mySmallLocalExecTLSv2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+13]]) mySmallLocalExecTLSv2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 4, 13, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 3, 0(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, 32748
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 17) mySmallLocalExecTLS2[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+17]]) mySmallLocalExecTLS2[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 24(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 2
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 4, 320(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, -16788
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 19) mySmallLocalExecTLS3[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+19]]) mySmallLocalExecTLS3[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 4, 324(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 13, -788
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 21) mySmallLocalExecTLS4[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+21]]) mySmallLocalExecTLS4[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 4, 13, 15212
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 23) mySmallLocalExecTLS5[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: [[#NFA+23]]) mySmallLocalExecTLS5[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 328(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 88
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 3, 332(4)
@@ -227,23 +227,23 @@ entry:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
; DIS: Disassembly of section .data:
-; DIS: 00000000000000a0 (idx: 7) StoreArrays1[DS]:
+; DIS: 00000000000000a0 (idx: [[#NFA+7]]) StoreArrays1[DS]:
; DIS-NEXT: a0: 00 00 00 00
-; DIS-NEXT: 00000000000000a0: R_POS (idx: 3) .StoreArrays1
+; DIS-NEXT: 00000000000000a0: R_POS (idx: [[#NFA+3]]) .StoreArrays1
; DIS-NEXT: a4: 00 00 00 00
; DIS-NEXT: a8: 00 00 00 00
-; DIS-NEXT: 00000000000000a8: R_POS (idx: 11) TOC[TC0]
+; DIS-NEXT: 00000000000000a8: R_POS (idx: [[#NFA+11]]) TOC[TC0]
; DIS-NEXT: ac: 00 00 00 d0
-; DIS: 00000000000000b8 (idx: 9) StoreArrays2[DS]:
+; DIS: 00000000000000b8 (idx: [[#NFA+9]]) StoreArrays2[DS]:
; DIS-NEXT: b8: 00 00 00 00
-; DIS-NEXT: 00000000000000b8: R_POS (idx: 5) .StoreArrays2
+; DIS-NEXT: 00000000000000b8: R_POS (idx: [[#NFA+5]]) .StoreArrays2
; DIS-NEXT: bc: 00 00 00 50
; DIS-NEXT: c0: 00 00 00 00
-; DIS-NEXT: 00000000000000c0: R_POS (idx: 11) TOC[TC0]
+; DIS-NEXT: 00000000000000c0: R_POS (idx: [[#NFA+11]]) TOC[TC0]
; DIS-NEXT: c4: 00 00 00 d0
-; DIS: 00000000000000d0 (idx: 13) mySmallLocalExecTLSv2[TE]:
+; DIS: 00000000000000d0 (idx: [[#NFA+13]]) mySmallLocalExecTLSv2[TE]:
; DIS-NEXT: d0: 00 00 00 00
-; DIS-NEXT: 00000000000000d0: R_TLS_LE (idx: 25) mySmallLocalExecTLSv2[TL]
+; DIS-NEXT: 00000000000000d0: R_TLS_LE (idx: [[#NFA+25]]) mySmallLocalExecTLSv2[TL]
; DIS-NEXT: d4: 00 01 79 ec
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
index e34bb130d5ed2..46fa52815e969 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
@@ -1,26 +1,26 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=REL64 %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM64 %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS64 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=REL64 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM64 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-ibm-aix-xcoff -code-model=small \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=REL64 %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM64 %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS64 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=REL64 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM64 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=REL32 %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM32 %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS32 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=REL32 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM32 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc-ibm-aix-xcoff -code-model=small \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=REL32 %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM32 %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS32 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=REL32 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM32 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS32 %s
@global_int_nonzero = thread_local(initialexec) global i32 1, align 4
@intern_int_zero = internal thread_local(initialexec) global i32 0, align 4
@@ -48,61 +48,60 @@ entry:
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
-; REL64: File: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o
+; REL64: File:
; REL64-NEXT: Format: aix5coff64-rs6000
; REL64-NEXT: Arch: powerpc64
; REL64-NEXT: AddressSize: 64bit
; REL64-NEXT: Relocations [
; REL64: Virtual Address: 0x2
-; REL64-NEXT: Symbol: intern_int_zero (17)
+; REL64-NEXT: Symbol: intern_int_zero ([[#NFA+17]])
; REL64-NEXT: IsSigned: No
; REL64-NEXT: FixupBitValue: 0
; REL64-NEXT: Length: 16
; REL64-NEXT: Type: R_TOC (0x3)
; REL64-NEXT: }
; REL64: Virtual Address: 0x12
-; REL64-NEXT: Symbol: global_int_nonzero (19)
+; REL64-NEXT: Symbol: global_int_nonzero ([[#NFA+19]])
; REL64-NEXT: IsSigned: No
; REL64-NEXT: FixupBitValue: 0
; REL64-NEXT: Length: 16
; REL64-NEXT: Type: R_TOC (0x3)
; REL64-NEXT: }
; REL64: Virtual Address: 0x22
-; REL64-NEXT: Symbol: intern_int_zero (17)
+; REL64-NEXT: Symbol: intern_int_zero ([[#NFA+17]])
; REL64-NEXT: IsSigned: No
; REL64-NEXT: FixupBitValue: 0
; REL64-NEXT: Length: 16
; REL64-NEXT: Type: R_TOC (0x3)
; REL64-NEXT: }
; REL64: Virtual Address: 0x78
-; REL64-NEXT: Symbol: intern_int_zero (25)
+; REL64-NEXT: Symbol: intern_int_zero ([[#NFA+25]])
; REL64-NEXT: IsSigned: No
; REL64-NEXT: FixupBitValue: 0
; REL64-NEXT: Length: 64
; REL64-NEXT: Type: R_TLS_IE (0x21)
; REL64-NEXT: }
; REL64: Virtual Address: 0x80
-; REL64-NEXT: Symbol: global_int_nonzero (23)
+; REL64-NEXT: Symbol: global_int_nonzero ([[#NFA+23]])
; REL64-NEXT: IsSigned: No
; REL64-NEXT: FixupBitValue: 0
; REL64-NEXT: Length: 64
; REL64-NEXT: Type: R_TLS_IE (0x21)
; REL64-NEXT: }
-; SYM64: File: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o
+; SYM64: File:
; SYM64-NEXT: Format: aix5coff64-rs6000
; SYM64-NEXT: Arch: powerpc64
; SYM64-NEXT: AddressSize: 64bit
; SYM64-NEXT: Symbols [
-; SYM64: Index: 17
-; SYM64-NEXT: Name: intern_int_zero
+; SYM64: Name: intern_int_zero
; SYM64-NEXT: Value (RelocatableAddress): 0x78
; SYM64-NEXT: Section: .data
; SYM64-NEXT: Type: 0x0
; SYM64-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM64-NEXT: NumberOfAuxEntries: 1
; SYM64-NEXT: CSECT Auxiliary Entry {
-; SYM64-NEXT: Index: 18
+; SYM64-NEXT: Index: [[#INDX:]]
; SYM64-NEXT: SectionLen: 8
; SYM64-NEXT: ParameterHashIndex: 0x0
; SYM64-NEXT: TypeChkSectNum: 0x0
@@ -112,7 +111,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM64-NEXT: }
; SYM64-NEXT: }
-; SYM64: Index: 19
+; SYM64: Index: [[#INDX+1]]
; SYM64-NEXT: Name: global_int_nonzero
; SYM64-NEXT: Value (RelocatableAddress): 0x80
; SYM64-NEXT: Section: .data
@@ -120,7 +119,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM64-NEXT: NumberOfAuxEntries: 1
; SYM64-NEXT: CSECT Auxiliary Entry {
-; SYM64-NEXT: Index: 20
+; SYM64-NEXT: Index: [[#INDX+2]]
; SYM64-NEXT: SectionLen: 8
; SYM64-NEXT: ParameterHashIndex: 0x0
; SYM64-NEXT: TypeChkSectNum: 0x0
@@ -130,7 +129,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM64-NEXT: }
; SYM64-NEXT: }
-; SYM64: Index: 23
+; SYM64: Index: [[#INDX+5]]
; SYM64-NEXT: Name: global_int_nonzero
; SYM64-NEXT: Value (RelocatableAddress): 0x0
; SYM64-NEXT: Section: .tdata
@@ -138,8 +137,8 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: StorageClass: C_EXT (0x2)
; SYM64-NEXT: NumberOfAuxEntries: 1
; SYM64-NEXT: CSECT Auxiliary Entry {
-; SYM64-NEXT: Index: 24
-; SYM64-NEXT: ContainingCsectSymbolIndex: 21
+; SYM64-NEXT: Index: [[#INDX+6]]
+; SYM64-NEXT: ContainingCsectSymbolIndex: [[#INDX+3]]
; SYM64-NEXT: ParameterHashIndex: 0x0
; SYM64-NEXT: TypeChkSectNum: 0x0
; SYM64-NEXT: SymbolAlignmentLog2: 0
@@ -148,7 +147,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM64-NEXT: }
; SYM64-NEXT: }
-; SYM64: Index: 25
+; SYM64: Index: [[#INDX+7]]
; SYM64-NEXT: Name: intern_int_zero
; SYM64-NEXT: Value (RelocatableAddress): 0x4
; SYM64-NEXT: Section: .tbss
@@ -156,7 +155,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM64-NEXT: NumberOfAuxEntries: 1
; SYM64-NEXT: CSECT Auxiliary Entry {
-; SYM64-NEXT: Index: 26
+; SYM64-NEXT: Index: [[#INDX+8]]
; SYM64-NEXT: SectionLen: 4
; SYM64-NEXT: ParameterHashIndex: 0x0
; SYM64-NEXT: TypeChkSectNum: 0x0
@@ -167,121 +166,120 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM64-NEXT: }
; SYM64-NEXT: }
-; DIS64: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o: file format aix5coff64-rs6000
+; DIS64: {{.*}}: file format aix5coff64-rs6000
; DIS64: Disassembly of section .text:
-; DIS64: (idx: 3) .store_intern_int_zero:
+; DIS64: (idx: [[#NFA+3]]) .store_intern_int_zero:
; DIS64-NEXT: ld 4, 0(2)
-; DIS64-NEXT: (idx: 17) intern_int_zero[TC]
+; DIS64-NEXT: (idx: [[#NFA+17]]) intern_int_zero[TC]
; DIS64-NEXT: stwx 3, 13, 4
; DIS64-NEXT: blr
-; DIS64: (idx: 5) .load_global_int_nonzero:
+; DIS64: (idx: [[#NFA+5]]) .load_global_int_nonzero:
; DIS64-NEXT: ld 3, 8(2)
-; DIS64-NEXT: (idx: 19) global_int_nonzero[TC]
+; DIS64-NEXT: (idx: [[#NFA+19]]) global_int_nonzero[TC]
; DIS64-NEXT: lwax 3, 13, 3
; DIS64-NEXT: blr
-; DIS64: (idx: 7) .load_intern_int_zero:
+; DIS64: (idx: [[#NFA+7]]) .load_intern_int_zero:
; DIS64-NEXT: ld 3, 0(2)
-; DIS64-NEXT: (idx: 17) intern_int_zero[TC]
+; DIS64-NEXT: (idx: [[#NFA+17]]) intern_int_zero[TC]
; DIS64-NEXT: lwax 3, 13, 3
; DIS64-NEXT: blr
; DIS64: Disassembly of section .data:
-; DIS64: (idx: 9) store_intern_int_zero[DS]:
-; DIS64: R_POS (idx: 3) .store_intern_int_zero
-; DIS64: R_POS (idx: 15) TOC[TC0]
-; DIS64: (idx: 11) load_global_int_nonzero[DS]:
-; DIS64: R_POS (idx: 5) .load_global_int_nonzero
-; DIS64: R_POS (idx: 15) TOC[TC0]
-; DIS64: (idx: 13) load_intern_int_zero[DS]:
-; DIS64: R_POS (idx: 7) .load_intern_int_zero
-; DIS64: R_POS (idx: 15) TOC[TC0]
-; DIS64: (idx: 17) intern_int_zero[TC]:
-; DIS64: R_TLS_IE (idx: 25) intern_int_zero[UL]
-; DIS64: (idx: 19) global_int_nonzero[TC]:
-; DIS64: R_TLS_IE (idx: 23) global_int_nonzero
+; DIS64: (idx: [[#NFA+9]]) store_intern_int_zero[DS]:
+; DIS64: R_POS (idx: [[#NFA+3]]) .store_intern_int_zero
+; DIS64: R_POS (idx: [[#NFA+15]]) TOC[TC0]
+; DIS64: (idx: [[#NFA+11]]) load_global_int_nonzero[DS]:
+; DIS64: R_POS (idx: [[#NFA+5]]) .load_global_int_nonzero
+; DIS64: R_POS (idx: [[#NFA+15]]) TOC[TC0]
+; DIS64: (idx: [[#NFA+13]]) load_intern_int_zero[DS]:
+; DIS64: R_POS (idx: [[#NFA+7]]) .load_intern_int_zero
+; DIS64: R_POS (idx: [[#NFA+15]]) TOC[TC0]
+; DIS64: (idx: [[#NFA+17]]) intern_int_zero[TC]:
+; DIS64: R_TLS_IE (idx: [[#NFA+25]]) intern_int_zero[UL]
+; DIS64: (idx: [[#NFA+19]]) global_int_nonzero[TC]:
+; DIS64: R_TLS_IE (idx: [[#NFA+23]]) global_int_nonzero
; DIS64: Disassembly of section .tdata:
-; DIS64: (idx: 23) global_int_nonzero:
+; DIS64: (idx: [[#NFA+23]]) global_int_nonzero:
; DIS64: Disassembly of section .tbss:
-; DIS64: (idx: 25) intern_int_zero[UL]:
+; DIS64: (idx: [[#NFA+25]]) intern_int_zero[UL]:
-; REL32: File: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o
+; REL32: File:
; REL32-NEXT: Format: aixcoff-rs6000
; REL32-NEXT: Arch: powerpc
; REL32-NEXT: AddressSize: 32bit
; REL32-NEXT: Relocations [
; REL32: Virtual Address: 0xA
-; REL32-NEXT: Symbol: intern_int_zero (19)
+; REL32-NEXT: Symbol: intern_int_zero ([[#NFA+19]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 16
; REL32-NEXT: Type: R_TOC (0x3)
; REL32-NEXT: }
; REL32: Virtual Address: 0x10
-; REL32-NEXT: Symbol: .__get_tpointer (1)
+; REL32-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 26
; REL32-NEXT: Type: R_RBA (0x18)
; REL32-NEXT: }
; REL32: Virtual Address: 0x3A
-; REL32-NEXT: Symbol: global_int_nonzero (21)
+; REL32-NEXT: Symbol: global_int_nonzero ([[#NFA+21]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 16
; REL32-NEXT: Type: R_TOC (0x3)
; REL32-NEXT: }
; REL32: Virtual Address: 0x40
-; REL32-NEXT: Symbol: .__get_tpointer (1)
+; REL32-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 26
; REL32-NEXT: Type: R_RBA (0x18)
; REL32-NEXT: }
; REL32: Virtual Address: 0x6A
-; REL32-NEXT: Symbol: intern_int_zero (19)
+; REL32-NEXT: Symbol: intern_int_zero ([[#NFA+19]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 16
; REL32-NEXT: Type: R_TOC (0x3)
; REL32-NEXT: }
; REL32: Virtual Address: 0x70
-; REL32-NEXT: Symbol: .__get_tpointer (1)
+; REL32-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 26
; REL32-NEXT: Type: R_RBA (0x18)
; REL32-NEXT: }
; REL32: Virtual Address: 0xAC
-; REL32-NEXT: Symbol: intern_int_zero (27)
+; REL32-NEXT: Symbol: intern_int_zero ([[#NFA+27]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 32
; REL32-NEXT: Type: R_TLS_IE (0x21)
; REL32-NEXT: }
; REL32: Virtual Address: 0xB0
-; REL32-NEXT: Symbol: global_int_nonzero (25)
+; REL32-NEXT: Symbol: global_int_nonzero ([[#NFA+25]])
; REL32-NEXT: IsSigned: No
; REL32-NEXT: FixupBitValue: 0
; REL32-NEXT: Length: 32
; REL32-NEXT: Type: R_TLS_IE (0x21)
; REL32-NEXT: }
-; SYM32: File: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o
+; SYM32: File:
; SYM32-NEXT: Format: aixcoff-rs6000
; SYM32-NEXT: Arch: powerpc
; SYM32-NEXT: AddressSize: 32bit
; SYM32-NEXT: Symbols [
-; SYM32: Index: 19
-; SYM32-NEXT: Name: intern_int_zero
+; SYM32: Name: intern_int_zero
; SYM32-NEXT: Value (RelocatableAddress): 0xAC
; SYM32-NEXT: Section: .data
; SYM32-NEXT: Type: 0x0
; SYM32-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM32-NEXT: NumberOfAuxEntries: 1
; SYM32-NEXT: CSECT Auxiliary Entry {
-; SYM32-NEXT: Index: 20
+; SYM32-NEXT: Index: [[#INDX:]]
; SYM32-NEXT: SectionLen: 4
; SYM32-NEXT: ParameterHashIndex: 0x0
; SYM32-NEXT: TypeChkSectNum: 0x0
@@ -292,7 +290,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StabSectNum: 0x0
; SYM32-NEXT: }
; SYM32-NEXT: }
-; SYM32: Index: 21
+; SYM32: Index: [[#INDX+1]]
; SYM32-NEXT: Name: global_int_nonzero
; SYM32-NEXT: Value (RelocatableAddress): 0xB0
; SYM32-NEXT: Section: .data
@@ -300,7 +298,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM32-NEXT: NumberOfAuxEntries: 1
; SYM32-NEXT: CSECT Auxiliary Entry {
-; SYM32-NEXT: Index: 22
+; SYM32-NEXT: Index: [[#INDX+2]]
; SYM32-NEXT: SectionLen: 4
; SYM32-NEXT: ParameterHashIndex: 0x0
; SYM32-NEXT: TypeChkSectNum: 0x0
@@ -311,7 +309,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StabSectNum: 0x0
; SYM32-NEXT: }
; SYM32-NEXT: }
-; SYM32: Index: 25
+; SYM32: Index: [[#INDX+5]]
; SYM32-NEXT: Name: global_int_nonzero
; SYM32-NEXT: Value (RelocatableAddress): 0x0
; SYM32-NEXT: Section: .tdata
@@ -319,8 +317,8 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StorageClass: C_EXT (0x2)
; SYM32-NEXT: NumberOfAuxEntries: 1
; SYM32-NEXT: CSECT Auxiliary Entry {
-; SYM32-NEXT: Index: 26
-; SYM32-NEXT: ContainingCsectSymbolIndex: 23
+; SYM32-NEXT: Index: [[#INDX+6]]
+; SYM32-NEXT: ContainingCsectSymbolIndex: [[#INDX+3]]
; SYM32-NEXT: ParameterHashIndex: 0x0
; SYM32-NEXT: TypeChkSectNum: 0x0
; SYM32-NEXT: SymbolAlignmentLog2: 0
@@ -330,7 +328,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StabSectNum: 0x0
; SYM32-NEXT: }
; SYM32-NEXT: }
-; SYM32: Index: 27
+; SYM32: Index: [[#INDX+7]]
; SYM32-NEXT: Name: intern_int_zero
; SYM32-NEXT: Value (RelocatableAddress): 0x4
; SYM32-NEXT: Section: .tbss
@@ -338,7 +336,7 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM32-NEXT: NumberOfAuxEntries: 1
; SYM32-NEXT: CSECT Auxiliary Entry {
-; SYM32-NEXT: Index: 28
+; SYM32-NEXT: Index: [[#INDX+8]]
; SYM32-NEXT: SectionLen: 4
; SYM32-NEXT: ParameterHashIndex: 0x0
; SYM32-NEXT: TypeChkSectNum: 0x0
@@ -350,38 +348,38 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
; SYM32-NEXT: }
; SYM32-NEXT: }
-; DIS32: {{.*}}aix-tls-ie-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
+; DIS32: file format aixcoff-rs6000
; DIS32: Disassembly of section .text:
-; DIS32: (idx: 5) .store_intern_int_zero:
-; DIS32: R_TOC (idx: 19) intern_int_zero[TC]
-; DIS32: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS32: (idx: [[#NFA+5]]) .store_intern_int_zero:
+; DIS32: R_TOC (idx: [[#NFA+19]]) intern_int_zero[TC]
+; DIS32: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS32: blr
-; DIS32: (idx: 7) .load_global_int_nonzero:
-; DIS32: R_TOC (idx: 21) global_int_nonzero[TC]
-; DIS32: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS32: (idx: [[#NFA+7]]) .load_global_int_nonzero:
+; DIS32: R_TOC (idx: [[#NFA+21]]) global_int_nonzero[TC]
+; DIS32: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS32: blr
-; DIS32: (idx: 9) .load_intern_int_zero:
-; DIS32: R_TOC (idx: 19) intern_int_zero[TC]
-; DIS32: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS32: (idx: [[#NFA+9]]) .load_intern_int_zero:
+; DIS32: R_TOC (idx: [[#NFA+19]]) intern_int_zero[TC]
+; DIS32: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS32: blr
; DIS32: Disassembly of section .data:
-; DIS32: (idx: 11) store_intern_int_zero[DS]:
-; DIS32: R_POS (idx: 5) .store_intern_int_zero
-; DIS32: R_POS (idx: 17) TOC[TC0]
-; DIS32: (idx: 13) load_global_int_nonzero[DS]:
-; DIS32: R_POS (idx: 7) .load_global_int_nonzero
-; DIS32: R_POS (idx: 17) TOC[TC0]
-; DIS32: (idx: 15) load_intern_int_zero[DS]:
-; DIS32: R_POS (idx: 9) .load_intern_int_zero
-; DIS32: R_POS (idx: 17) TOC[TC0]
-; DIS32: (idx: 19) intern_int_zero[TC]:
-; DIS32: R_TLS_IE (idx: 27) intern_int_zero[UL]
-; DIS32: (idx: 21) global_int_nonzero[TC]:
-; DIS32: R_TLS_IE (idx: 25) global_int_nonzero
+; DIS32: (idx: [[#NFA+11]]) store_intern_int_zero[DS]:
+; DIS32: R_POS (idx: [[#NFA+5]]) .store_intern_int_zero
+; DIS32: R_POS (idx: [[#NFA+17]]) TOC[TC0]
+; DIS32: (idx: [[#NFA+13]]) load_global_int_nonzero[DS]:
+; DIS32: R_POS (idx: [[#NFA+7]]) .load_global_int_nonzero
+; DIS32: R_POS (idx: [[#NFA+17]]) TOC[TC0]
+; DIS32: (idx: [[#NFA+15]]) load_intern_int_zero[DS]:
+; DIS32: R_POS (idx: [[#NFA+9]]) .load_intern_int_zero
+; DIS32: R_POS (idx: [[#NFA+17]]) TOC[TC0]
+; DIS32: (idx: [[#NFA+19]]) intern_int_zero[TC]:
+; DIS32: R_TLS_IE (idx: [[#NFA+27]]) intern_int_zero[UL]
+; DIS32: (idx: [[#NFA+21]]) global_int_nonzero[TC]:
+; DIS32: R_TLS_IE (idx: [[#NFA+25]]) global_int_nonzero
; DIS32: Disassembly of section .tdata:
-; DIS32: (idx: 25) global_int_nonzero:
+; DIS32: (idx: [[#NFA+25]]) global_int_nonzero:
; DIS32: Disassembly of section .tbss:
-; DIS32: (idx: 27) intern_int_zero[UL]:
+; DIS32: (idx: [[#NFA+27]]) intern_int_zero[UL]:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
index 5283e24c060cc..83296de036d0d 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@ThreadLocalVarInit = thread_local(localexec) global i64 1, align 8
@VarInit = global i64 87, align 8
@@ -36,81 +36,81 @@ entry:
ret i64 %add
}
-; RELOC: File: {{.*}}aix-tls-le-xcoff-reloc-large.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aix5coff64-rs6000
; RELOC-NEXT: Arch: powerpc64
; RELOC-NEXT: AddressSize: 64bit
; RELOC-NEXT: Relocations [
; RELOC: Virtual Address: 0x2
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (19)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+19]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x6
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (19)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+19]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x12
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (21)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x1A
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (21)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x42
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (25)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x46
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (25)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xA8
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (29)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xB0
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (27)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xC0
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (31)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+31]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
-; SYM: File: {{.*}}aix-tls-le-xcoff-reloc-large.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aix5coff64-rs6000
; SYM-NEXT: Arch: powerpc64
; SYM-NEXT: AddressSize: 64bit
; SYM-NEXT: Symbols [
-; SYM: Index: 19
+; SYM: Index: [[#NFA+19]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0xA8
; SYM-NEXT: Section: .data
@@ -118,7 +118,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 20
+; SYM-NEXT: Index: [[#NFA+20]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -128,7 +128,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 21
+; SYM: Index: [[#NFA+21]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0xB0
; SYM-NEXT: Section: .data
@@ -136,7 +136,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: [[#NFA+22]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -145,7 +145,7 @@ entry:
; SYM-NEXT: StorageMappingClass: XMC_TE (0x16)
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
-; SYM: Index: 25
+; SYM: Index: [[#NFA+25]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0xC0
; SYM-NEXT: Section: .data
@@ -153,7 +153,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 26
+; SYM-NEXT: Index: [[#NFA+26]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -163,7 +163,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 27
+; SYM: Index: [[#NFA+27]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -171,7 +171,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 28
+; SYM-NEXT: Index: [[#NFA+28]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -181,7 +181,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 29
+; SYM: Index: [[#NFA+29]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0x8
; SYM-NEXT: Section: .tbss
@@ -189,7 +189,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 30
+; SYM-NEXT: Index: [[#NFA+30]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -199,7 +199,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 31
+; SYM: Index: [[#NFA+31]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0x10
; SYM-NEXT: Section: .tbss
@@ -207,7 +207,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 32
+; SYM-NEXT: Index: [[#NFA+32]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -218,93 +218,93 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
-; DIS: {{.*}}aix-tls-le-xcoff-reloc-large.ll.tmp.o: file format aix5coff64-rs6000
+; DIS: file format aix5coff64-rs6000
; DIS: Disassembly of section .text:
-; DIS: 0000000000000000 (idx: 3) .storeITLUninit:
+; DIS: 0000000000000000 (idx: [[#NFA+3]]) .storeITLUninit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 19) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 19) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stdx 3, 13, 4
; DIS-NEXT: blr
-; DIS: 0000000000000010 (idx: 5) .loadTLInit:
+; DIS: 0000000000000010 (idx: [[#NFA+5]]) .loadTLInit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) ThreadLocalVarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 23) VarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+23]]) VarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 8(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) ThreadLocalVarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 16(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 23) VarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+23]]) VarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ldx 3, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 4, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
-; DIS: 0000000000000030 (idx: 7) .loadTLUninit:
+; DIS: 0000000000000030 (idx: [[#NFA+7]]) .loadTLUninit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 19) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 0(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 19) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stdx 4, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 25) IThreadLocalVarUninit2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 24(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 25) IThreadLocalVarUninit2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ldx 3, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 3, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
; DIS: Disassembly of section .data:
-; DIS: 0000000000000058 (idx: 9) VarInit[RW]:
+; DIS: 0000000000000058 (idx: [[#NFA+9]]) VarInit[RW]:
; DIS-NEXT: 58: 00 00 00 00
; DIS-NEXT: 5c: 00 00 00 57
-; DIS: 0000000000000060 (idx: 11) storeITLUninit[DS]:
+; DIS: 0000000000000060 (idx: [[#NFA+11]]) storeITLUninit[DS]:
; DIS-NEXT: 60: 00 00 00 00
-; DIS-NEXT: 0000000000000060: R_POS (idx: 3) .storeITLUninit
+; DIS-NEXT: 0000000000000060: R_POS (idx: [[#NFA+3]]) .storeITLUninit
; DIS-NEXT: 64: 00 00 00 00
; DIS-NEXT: 68: 00 00 00 00
-; DIS-NEXT: 0000000000000068: R_POS (idx: 17) TOC[TC0]
+; DIS-NEXT: 0000000000000068: R_POS (idx: [[#NFA+17]]) TOC[TC0]
; DIS-NEXT: 6c: 00 00 00 a8
-; DIS: 0000000000000078 (idx: 13) loadTLInit[DS]:
+; DIS: 0000000000000078 (idx: [[#NFA+13]]) loadTLInit[DS]:
; DIS-NEXT: 78: 00 00 00 00
-; DIS-NEXT: 0000000000000078: R_POS (idx: 5) .loadTLInit
+; DIS-NEXT: 0000000000000078: R_POS (idx: [[#NFA+5]]) .loadTLInit
; DIS-NEXT: 7c: 00 00 00 10
; DIS-NEXT: 80: 00 00 00 00
-; DIS-NEXT: 0000000000000080: R_POS (idx: 17) TOC[TC0]
+; DIS-NEXT: 0000000000000080: R_POS (idx: [[#NFA+17]]) TOC[TC0]
; DIS-NEXT: 84: 00 00 00 a8
-; DIS: 0000000000000090 (idx: 15) loadTLUninit[DS]:
+; DIS: 0000000000000090 (idx: [[#NFA+15]]) loadTLUninit[DS]:
; DIS-NEXT: 90: 00 00 00 00
-; DIS-NEXT: 0000000000000090: R_POS (idx: 7) .loadTLUninit
+; DIS-NEXT: 0000000000000090: R_POS (idx: [[#NFA+7]]) .loadTLUninit
; DIS-NEXT: 94: 00 00 00 30
; DIS-NEXT: 98: 00 00 00 00
-; DIS-NEXT: 0000000000000098: R_POS (idx: 17) TOC[TC0]
+; DIS-NEXT: 0000000000000098: R_POS (idx: [[#NFA+17]]) TOC[TC0]
; DIS-NEXT: 9c: 00 00 00 a8
-; DIS: 00000000000000a8 (idx: 19) IThreadLocalVarUninit[TE]:
+; DIS: 00000000000000a8 (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]:
; DIS-NEXT: a8: 00 00 00 00
-; DIS-NEXT: 00000000000000a8: R_TLS_LE (idx: 29) IThreadLocalVarUninit[UL]
+; DIS-NEXT: 00000000000000a8: R_TLS_LE (idx: [[#NFA+29]]) IThreadLocalVarUninit[UL]
; DIS-NEXT: ac: 00 00 00 08
-; DIS: 00000000000000b0 (idx: 21) ThreadLocalVarInit[TE]:
+; DIS: 00000000000000b0 (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]:
; DIS-NEXT: b0: 00 00 00 00
-; DIS-NEXT: 00000000000000b0: R_TLS_LE (idx: 27) ThreadLocalVarInit[TL]
+; DIS-NEXT: 00000000000000b0: R_TLS_LE (idx: [[#NFA+27]]) ThreadLocalVarInit[TL]
; DIS-NEXT: b4: 00 00 00 00
-; DIS: 00000000000000b8 (idx: 23) VarInit[TE]:
+; DIS: 00000000000000b8 (idx: [[#NFA+23]]) VarInit[TE]:
; DIS-NEXT: b8: 00 00 00 00
-; DIS-NEXT: 00000000000000b8: R_POS (idx: 9) VarInit[RW]
+; DIS-NEXT: 00000000000000b8: R_POS (idx: [[#NFA+9]]) VarInit[RW]
; DIS-NEXT: bc: 00 00 00 58
-; DIS: 00000000000000c0 (idx: 25) IThreadLocalVarUninit2[TE]:
+; DIS: 00000000000000c0 (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]:
; DIS-NEXT: c0: 00 00 00 00
-; DIS-NEXT: 00000000000000c0: R_TLS_LE (idx: 31) IThreadLocalVarUninit2[UL]
+; DIS-NEXT: 00000000000000c0: R_TLS_LE (idx: [[#NFA+31]]) IThreadLocalVarUninit2[UL]
; DIS-NEXT: c4: 00 00 00 10
; DIS: Disassembly of section .tdata:
-; DIS: 0000000000000000 (idx: 27) ThreadLocalVarInit[TL]:
+; DIS: 0000000000000000 (idx: [[#NFA+27]]) ThreadLocalVarInit[TL]:
; DIS-NEXT: 0: 00 00 00 00
; DIS-NEXT: 4: 00 00 00 01
; DIS: Disassembly of section .tbss:
-; DIS: 0000000000000008 (idx: 29) IThreadLocalVarUninit[UL]:
+; DIS: 0000000000000008 (idx: [[#NFA+29]]) IThreadLocalVarUninit[UL]:
; DIS-NEXT: ...
-; DIS: 0000000000000010 (idx: 31) IThreadLocalVarUninit2[UL]:
+; DIS: 0000000000000010 (idx: [[#NFA+31]]) IThreadLocalVarUninit2[UL]:
; DIS-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
index 9897fc89b4230..3b754e362f12f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@ThreadLocalVarInit = thread_local(localexec) global i64 1, align 8
@VarInit = global i64 87, align 8
@@ -36,69 +36,69 @@ entry:
ret i64 %add
}
-; RELOC: File: {{.*}}aix-tls-le-xcoff-reloc-large32.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aixcoff-rs6000
; RELOC-NEXT: Arch: powerpc
; RELOC-NEXT: AddressSize: 32bit
; RELOC-NEXT: Relocations [
; RELOC: Virtual Address: 0x12
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (21)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x16
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (21)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x18
-; RELOC-NEXT: Symbol: .__get_tpointer (1)
+; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
; RELOC-NEXT: Type: R_RBA (0x18)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x4E
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (23)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x52
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (23)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x54
-; RELOC-NEXT: Symbol: .__get_tpointer (1)
+; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
; RELOC-NEXT: Type: R_RBA (0x18)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xBE
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (27)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCU (0x30)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xC2
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (27)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOCL (0x31)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x114
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (31)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+31]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -106,26 +106,26 @@ entry:
; RELOC-NEXT: }
; RELOC: Relocation {
; RELOC-NEXT: Virtual Address: 0x118
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (29)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x120
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (33)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+33]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
-; SYM: File: {{.*}}aix-tls-le-xcoff-reloc-large32.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aixcoff-rs6000
; SYM-NEXT: Arch: powerpc
; SYM-NEXT: AddressSize: 32bit
; SYM-NEXT: Symbols [
-; SYM: Index: 1
+; SYM: Index: [[#NFA+1]]
; SYM-NEXT: Name: .__get_tpointer
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -133,7 +133,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 2
+; SYM-NEXT: Index: [[#NFA+2]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -144,7 +144,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 21
+; SYM: Index: [[#NFA+21]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0x114
; SYM-NEXT: Section: .data
@@ -152,7 +152,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: [[#NFA+22]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -163,7 +163,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 23
+; SYM: Index: [[#NFA+23]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0x118
; SYM-NEXT: Section: .data
@@ -171,7 +171,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: [[#NFA+24]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -182,7 +182,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 27
+; SYM: Index: [[#NFA+27]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0x120
; SYM-NEXT: Section: .data
@@ -190,7 +190,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 28
+; SYM-NEXT: Index: [[#NFA+28]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -201,7 +201,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 29
+; SYM: Index: [[#NFA+29]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -209,7 +209,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 30
+; SYM-NEXT: Index: [[#NFA+30]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -220,7 +220,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 31
+; SYM: Index: [[#NFA+31]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0x8
; SYM-NEXT: Section: .tbss
@@ -228,7 +228,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 32
+; SYM-NEXT: Index: [[#NFA+32]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -239,7 +239,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 33
+; SYM: Index: [[#NFA+33]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0x10
; SYM-NEXT: Section: .tbss
@@ -247,7 +247,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 34
+; SYM-NEXT: Index: [[#NFA+34]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -259,19 +259,19 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
-; DIS: {{.*}}aix-tls-le-xcoff-reloc-large32.ll.tmp.o: file format aixcoff-rs6000
+; DIS: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 (idx: 5) .storeITLUninit:
+; DIS: 00000000 (idx: [[#NFA+5]]) .storeITLUninit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: mr 5, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 6, 0(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 6
; DIS-NEXT: stw 4, 4(3)
; DIS-NEXT: stw 5, 0(3)
@@ -279,23 +279,23 @@ entry:
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000040 (idx: 7) .loadTLInit:
+; DIS: 00000040 (idx: [[#NFA+7]]) .loadTLInit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 23) ThreadLocalVarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 23) ThreadLocalVarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 5, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 25) VarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+25]]) VarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 8(5)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 25) VarInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+25]]) VarInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 6, 4(5)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 0(5)
; DIS-NEXT: addc 4, 6, 4
@@ -304,25 +304,25 @@ entry:
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000090 (idx: 9) .loadTLUninit:
+; DIS: 00000090 (idx: [[#NFA+9]]) .loadTLUninit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: li 5, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 0(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) IThreadLocalVarUninit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 4, 3, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 4(4)
; DIS-NEXT: li 5, 0
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 0(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 27) IThreadLocalVarUninit2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 27) IThreadLocalVarUninit2[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(3)
@@ -334,48 +334,48 @@ entry:
; DIS-NEXT: blr
; DIS: Disassembly of section .data:
-; DIS: 000000e8 (idx: 11) VarInit[RW]:
+; DIS: 000000e8 (idx: [[#NFA+11]]) VarInit[RW]:
; DIS-NEXT: e8: 00 00 00 00
; DIS-NEXT: ec: 00 00 00 57
-; DIS: 000000f0 (idx: 13) storeITLUninit[DS]:
+; DIS: 000000f0 (idx: [[#NFA+13]]) storeITLUninit[DS]:
; DIS-NEXT: f0: 00 00 00 00
-; DIS-NEXT: 000000f0: R_POS (idx: 5) .storeITLUninit
+; DIS-NEXT: 000000f0: R_POS (idx: [[#NFA+5]]) .storeITLUninit
; DIS-NEXT: f4: 00 00 01 14
-; DIS-NEXT: 000000f4: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 000000f4: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: f8: 00 00 00 00
-; DIS: 000000fc (idx: 15) loadTLInit[DS]:
+; DIS: 000000fc (idx: [[#NFA+15]]) loadTLInit[DS]:
; DIS-NEXT: fc: 00 00 00 40
-; DIS-NEXT: 000000fc: R_POS (idx: 7) .loadTLInit
+; DIS-NEXT: 000000fc: R_POS (idx: [[#NFA+7]]) .loadTLInit
; DIS-NEXT: 100: 00 00 01 14
-; DIS-NEXT: 00000100: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 00000100: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: 104: 00 00 00 00
-; DIS: 00000108 (idx: 17) loadTLUninit[DS]:
+; DIS: 00000108 (idx: [[#NFA+17]]) loadTLUninit[DS]:
; DIS-NEXT: 108: 00 00 00 90
-; DIS-NEXT: 00000108: R_POS (idx: 9) .loadTLUninit
+; DIS-NEXT: 00000108: R_POS (idx: [[#NFA+9]]) .loadTLUninit
; DIS-NEXT: 10c: 00 00 01 14
-; DIS-NEXT: 0000010c: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 0000010c: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: 110: 00 00 00 00
-; DIS: 00000114 (idx: 21) IThreadLocalVarUninit[TE]:
+; DIS: 00000114 (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]:
; DIS-NEXT: 114: 00 00 00 08
-; DIS-NEXT: 00000114: R_TLS_LE (idx: 31) IThreadLocalVarUninit[UL]
-; DIS: 00000118 (idx: 23) ThreadLocalVarInit[TE]:
+; DIS-NEXT: 00000114: R_TLS_LE (idx: [[#NFA+31]]) IThreadLocalVarUninit[UL]
+; DIS: 00000118 (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]:
; DIS-NEXT: 118: 00 00 00 00
-; DIS-NEXT: 00000118: R_TLS_LE (idx: 29) ThreadLocalVarInit[TL]
-; DIS: 0000011c (idx: 25) VarInit[TE]:
+; DIS-NEXT: 00000118: R_TLS_LE (idx: [[#NFA+29]]) ThreadLocalVarInit[TL]
+; DIS: 0000011c (idx: [[#NFA+25]]) VarInit[TE]:
; DIS-NEXT: 11c: 00 00 00 e8
-; DIS-NEXT: 0000011c: R_POS (idx: 11) VarInit[RW]
-; DIS: 00000120 (idx: 27) IThreadLocalVarUninit2[TE]:
+; DIS-NEXT: 0000011c: R_POS (idx: [[#NFA+11]]) VarInit[RW]
+; DIS: 00000120 (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]:
; DIS-NEXT: 120: 00 00 00 10
-; DIS-NEXT: 00000120: R_TLS_LE (idx: 33) IThreadLocalVarUninit2[UL]
+; DIS-NEXT: 00000120: R_TLS_LE (idx: [[#NFA+33]]) IThreadLocalVarUninit2[UL]
; DIS: Disassembly of section .tdata:
-; DIS: 00000000 (idx: 29) ThreadLocalVarInit[TL]:
+; DIS: 00000000 (idx: [[#NFA+29]]) ThreadLocalVarInit[TL]:
; DIS-NEXT: 0: 00 00 00 00
; DIS-NEXT: 4: 00 00 00 01
; DIS: Disassembly of section .tbss:
-; DIS: 00000008 (idx: 31) IThreadLocalVarUninit[UL]:
+; DIS: 00000008 (idx: [[#NFA+31]]) IThreadLocalVarUninit[UL]:
; DIS-NEXT: ...
-; DIS: 00000010 (idx: 33) IThreadLocalVarUninit2[UL]:
+; DIS: 00000010 (idx: [[#NFA+33]]) IThreadLocalVarUninit2[UL]:
; DIS-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
index d469a86901109..c67c79e3ab7be 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@ThreadLocalVarInit = thread_local(localexec) global i32 1, align 4
@VarInit = global i32 87, align 4
@@ -36,60 +36,60 @@ entry:
ret i32 %add
}
-; RELOC: File: {{.*}}aix-tls-le-xcoff-reloc.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aix5coff64-rs6000
; RELOC-NEXT: Arch: powerpc64
; RELOC-NEXT: AddressSize: 64bit
; RELOC-NEXT: Relocations [
; RELOC: Virtual Address: 0x2
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (21)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x12
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (23)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x3E
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (27)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xA0
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (33)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+33]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xA8
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (31)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+31]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xB8
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (35)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+35]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 64
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
-; SYM: File: {{.*}}aix-tls-le-xcoff-reloc.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aix5coff64-rs6000
; SYM-NEXT: Arch: powerpc64
; SYM-NEXT: AddressSize: 64bit
; SYM-NEXT: Symbols [
-; SYM: Index: 21
+; SYM: Index: [[#NFA+21]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0xA0
; SYM-NEXT: Section: .data
@@ -97,7 +97,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: [[#NFA+22]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -107,7 +107,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 23
+; SYM: Index: [[#NFA+23]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0xA8
; SYM-NEXT: Section: .data
@@ -115,7 +115,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: [[#NFA+24]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -125,7 +125,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 27
+; SYM: Index: [[#NFA+27]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0xB8
; SYM-NEXT: Section: .data
@@ -133,7 +133,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 28
+; SYM-NEXT: Index: [[#NFA+28]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -143,7 +143,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 31
+; SYM: Index: [[#NFA+31]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -151,8 +151,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 32
-; SYM-NEXT: ContainingCsectSymbolIndex: 29
+; SYM-NEXT: Index: [[#NFA+32]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+29]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -161,7 +161,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 33
+; SYM: Index: [[#NFA+33]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0x4
; SYM-NEXT: Section: .tbss
@@ -169,7 +169,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 34
+; SYM-NEXT: Index: [[#NFA+34]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -179,7 +179,7 @@ entry:
; SYM-NEXT: Auxiliary Type: AUX_CSECT (0xFB)
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 35
+; SYM: Index: [[#NFA+35]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0x8
; SYM-NEXT: Section: .tbss
@@ -187,7 +187,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 36
+; SYM-NEXT: Index: [[#NFA+36]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -198,83 +198,83 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
-; DIS: {{.*}}aix-tls-le-xcoff-reloc.ll.tmp.o: file format aix5coff64-rs6000
+; DIS: file format aix5coff64-rs6000
; DIS: Disassembly of section .text:
-; DIS: 0000000000000000 (idx: 3) .storeITLUninit:
+; DIS: 0000000000000000 (idx: [[#NFA+3]]) .storeITLUninit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 21) IThreadLocalVarUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+21]]) IThreadLocalVarUninit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 3, 13, 4
; DIS-NEXT: blr
-; DIS: 0000000000000010 (idx: 5) .loadTLInit:
+; DIS: 0000000000000010 (idx: [[#NFA+5]]) .loadTLInit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 8(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) ThreadLocalVarInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) ThreadLocalVarInit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 16(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) VarInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+25]]) VarInit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 0(4)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 4, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} extsw 3, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
-; DIS: 0000000000000030 (idx: 7) .loadTLUninit:
+; DIS: 0000000000000030 (idx: [[#NFA+7]]) .loadTLUninit:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 21) IThreadLocalVarUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+21]]) IThreadLocalVarUninit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 4, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 24(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) IThreadLocalVarUninit2[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 13, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 3, 3, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} extsw 3, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
; DIS: Disassembly of section .data:
-; DIS: 0000000000000050 (idx: 11) VarInit:
+; DIS: 0000000000000050 (idx: [[#NFA+11]]) VarInit:
; DIS-NEXT: 50: 00 00 00 57
-; DIS: 0000000000000058 (idx: 13) storeITLUninit[DS]:
+; DIS: 0000000000000058 (idx: [[#NFA+13]]) storeITLUninit[DS]:
; DIS-NEXT: 58: 00 00 00 00
-; DIS-NEXT: 0000000000000058: R_POS (idx: 3) .storeITLUninit
+; DIS-NEXT: 0000000000000058: R_POS (idx: [[#NFA+3]]) .storeITLUninit
; DIS-NEXT: 5c: 00 00 00 00
; DIS-NEXT: 60: 00 00 00 00
-; DIS-NEXT: 0000000000000060: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 0000000000000060: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: 64: 00 00 00 a0
-; DIS: 0000000000000070 (idx: 15) loadTLInit[DS]:
+; DIS: 0000000000000070 (idx: [[#NFA+15]]) loadTLInit[DS]:
; DIS-NEXT: 70: 00 00 00 00
-; DIS-NEXT: 0000000000000070: R_POS (idx: 5) .loadTLInit
+; DIS-NEXT: 0000000000000070: R_POS (idx: [[#NFA+5]]) .loadTLInit
; DIS-NEXT: 74: 00 00 00 10
; DIS-NEXT: 78: 00 00 00 00
-; DIS-NEXT: 0000000000000078: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 0000000000000078: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: 7c: 00 00 00 a0
-; DIS: 0000000000000088 (idx: 17) loadTLUninit[DS]:
+; DIS: 0000000000000088 (idx: [[#NFA+17]]) loadTLUninit[DS]:
; DIS-NEXT: 88: 00 00 00 00
-; DIS-NEXT: 0000000000000088: R_POS (idx: 7) .loadTLUninit
+; DIS-NEXT: 0000000000000088: R_POS (idx: [[#NFA+7]]) .loadTLUninit
; DIS-NEXT: 8c: 00 00 00 30
; DIS-NEXT: 90: 00 00 00 00
-; DIS-NEXT: 0000000000000090: R_POS (idx: 19) TOC[TC0]
+; DIS-NEXT: 0000000000000090: R_POS (idx: [[#NFA+19]]) TOC[TC0]
; DIS-NEXT: 94: 00 00 00 a0
-; DIS: 00000000000000a0 (idx: 21) IThreadLocalVarUninit[TC]:
+; DIS: 00000000000000a0 (idx: [[#NFA+21]]) IThreadLocalVarUninit[TC]:
; DIS-NEXT: a0: 00 00 00 00
-; DIS-NEXT: 00000000000000a0: R_TLS_LE (idx: 33) IThreadLocalVarUninit[UL]
+; DIS-NEXT: 00000000000000a0: R_TLS_LE (idx: [[#NFA+33]]) IThreadLocalVarUninit[UL]
; DIS-NEXT: a4: 00 00 00 04
-; DIS: 00000000000000a8 (idx: 23) ThreadLocalVarInit[TC]:
+; DIS: 00000000000000a8 (idx: [[#NFA+23]]) ThreadLocalVarInit[TC]:
; DIS-NEXT: a8: 00 00 00 00
-; DIS-NEXT: 00000000000000a8: R_TLS_LE (idx: 31) ThreadLocalVarInit
+; DIS-NEXT: 00000000000000a8: R_TLS_LE (idx: [[#NFA+31]]) ThreadLocalVarInit
; DIS-NEXT: ac: 00 00 00 00
-; DIS: 00000000000000b0 (idx: 25) VarInit[TC]:
+; DIS: 00000000000000b0 (idx: [[#NFA+25]]) VarInit[TC]:
; DIS-NEXT: b0: 00 00 00 00
-; DIS-NEXT: 00000000000000b0: R_POS (idx: 11) VarInit
+; DIS-NEXT: 00000000000000b0: R_POS (idx: [[#NFA+11]]) VarInit
; DIS-NEXT: b4: 00 00 00 50
-; DIS: 00000000000000b8 (idx: 27) IThreadLocalVarUninit2[TC]:
+; DIS: 00000000000000b8 (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TC]:
; DIS-NEXT: b8: 00 00 00 00
-; DIS-NEXT: 00000000000000b8: R_TLS_LE (idx: 35) IThreadLocalVarUninit2[UL]
+; DIS-NEXT: 00000000000000b8: R_TLS_LE (idx: [[#NFA+35]]) IThreadLocalVarUninit2[UL]
; DIS-NEXT: bc: 00 00 00 08
; DIS: Disassembly of section .tdata:
-; DIS: 0000000000000000 (idx: 31) ThreadLocalVarInit:
+; DIS: 0000000000000000 (idx: [[#NFA+31]]) ThreadLocalVarInit:
; DIS-NEXT: 0: 00 00 00 01
; DIS: Disassembly of section .tbss:
-; DIS: 0000000000000004 (idx: 33) IThreadLocalVarUninit[UL]:
+; DIS: 0000000000000004 (idx: [[#NFA+33]]) IThreadLocalVarUninit[UL]:
; DIS-NEXT: ...
-; DIS: 0000000000000008 (idx: 35) IThreadLocalVarUninit2[UL]:
+; DIS: 0000000000000008 (idx: [[#NFA+35]]) IThreadLocalVarUninit2[UL]:
; DIS-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
index a681cd815d430..4be292b3030fb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@ThreadLocalVarInit = thread_local(localexec) global i32 1, align 4
@VarInit = global i32 87, align 4
@@ -36,74 +36,74 @@ entry:
ret i32 %add
}
-; RELOC: File: {{.*}}aix-tls-le-xcoff-reloc32.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aixcoff-rs6000
; RELOC-NEXT: Arch: powerpc
; RELOC-NEXT: AddressSize: 32bit
; RELOC-NEXT: Relocations [
; RELOC: Virtual Address: 0xA
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (23)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x10
-; RELOC-NEXT: Symbol: .__get_tpointer (1)
+; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
; RELOC-NEXT: Type: R_RBA (0x18)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x3A
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (25)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x40
-; RELOC-NEXT: Symbol: .__get_tpointer (1)
+; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
; RELOC-NEXT: Type: R_RBA (0x18)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0x8E
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (29)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
; RELOC-NEXT: Type: R_TOC (0x3)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xD0
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit (35)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+35]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xD4
-; RELOC-NEXT: Symbol: ThreadLocalVarInit (33)
+; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+33]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
; RELOC: Virtual Address: 0xDC
-; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 (37)
+; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+37]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
; RELOC-NEXT: Type: R_TLS_LE (0x23)
; RELOC-NEXT: }
-; SYM: File: {{.*}}aix-tls-le-xcoff-reloc32.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aixcoff-rs6000
; SYM-NEXT: Arch: powerpc
; SYM-NEXT: AddressSize: 32bit
; SYM-NEXT: Symbols [
-; SYM: Index: 1
+; SYM: Index: [[#NFA+1]]
; SYM-NEXT: Name: .__get_tpointer
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -111,7 +111,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 2
+; SYM-NEXT: Index: [[#NFA+2]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -122,7 +122,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 23
+; SYM: Index: [[#NFA+23]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0xD0
; SYM-NEXT: Section: .data
@@ -130,7 +130,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: [[#NFA+24]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -141,7 +141,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 25
+; SYM: Index: [[#NFA+25]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0xD4
; SYM-NEXT: Section: .data
@@ -149,7 +149,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 26
+; SYM-NEXT: Index: [[#NFA+26]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -160,7 +160,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 29
+; SYM: Index: [[#NFA+29]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0xDC
; SYM-NEXT: Section: .data
@@ -168,7 +168,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 30
+; SYM-NEXT: Index: [[#NFA+30]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -179,7 +179,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 33
+; SYM: Index: [[#NFA+33]]
; SYM-NEXT: Name: ThreadLocalVarInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -187,8 +187,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 34
-; SYM-NEXT: ContainingCsectSymbolIndex: 31
+; SYM-NEXT: Index: [[#NFA+34]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+31]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -198,7 +198,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 35
+; SYM: Index: [[#NFA+35]]
; SYM-NEXT: Name: IThreadLocalVarUninit
; SYM-NEXT: Value (RelocatableAddress): 0x4
; SYM-NEXT: Section: .tbss
@@ -206,7 +206,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 36
+; SYM-NEXT: Index: [[#NFA+36]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -217,7 +217,7 @@ entry:
; SYM-NEXT: StabSectNum: 0x0
; SYM-NEXT: }
; SYM-NEXT: }
-; SYM: Index: 37
+; SYM: Index: [[#NFA+37]]
; SYM-NEXT: Name: IThreadLocalVarUninit2
; SYM-NEXT: Value (RelocatableAddress): 0x8
; SYM-NEXT: Section: .tbss
@@ -225,7 +225,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 38
+; SYM-NEXT: Index: [[#NFA+38]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -237,51 +237,51 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
-; DIS: {{.*}}aix-tls-le-xcoff-reloc32.ll.tmp.o: file format aixcoff-rs6000
+; DIS: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 (idx: 5) .storeITLUninit:
+; DIS: 00000000 (idx: [[#NFA+5]]) .storeITLUninit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) IThreadLocalVarUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]
; DIS-NEXT: mr 4, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 4, 3, 5
; DIS-NEXT: addi 1, 1, 32
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000030 (idx: 7) .loadTLInit:
+; DIS: 00000030 (idx: [[#NFA+7]]) .loadTLInit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) ThreadLocalVarInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+25]]) ThreadLocalVarInit[TC]
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 3, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 8(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) VarInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+27]]) VarInit[TC]
; DIS-NEXT: lwz 4, 0(4)
; DIS-NEXT: add 3, 4, 3
; DIS-NEXT: addi 1, 1, 32
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000070 (idx: 9) .loadTLUninit:
+; DIS: 00000070 (idx: [[#NFA+9]]) .loadTLUninit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) IThreadLocalVarUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]
; DIS-NEXT: li 5, 1
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__get_tpointer[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 5, 3, 4
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 29) IThreadLocalVarUninit2[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+29]]) IThreadLocalVarUninit2[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 3, 4
; DIS-NEXT: addi 3, 3, 1
; DIS-NEXT: addi 1, 1, 32
@@ -290,46 +290,46 @@ entry:
; DIS-NEXT: blr
; DIS: Disassembly of section .data:
-; DIS: 000000a8 (idx: 13) VarInit:
+; DIS: 000000a8 (idx: [[#NFA+13]]) VarInit:
; DIS-NEXT: a8: 00 00 00 57
-; DIS: 000000ac (idx: 15) storeITLUninit[DS]:
+; DIS: 000000ac (idx: [[#NFA+15]]) storeITLUninit[DS]:
; DIS-NEXT: ac: 00 00 00 00
-; DIS-NEXT: 000000ac: R_POS (idx: 5) .storeITLUninit
+; DIS-NEXT: 000000ac: R_POS (idx: [[#NFA+5]]) .storeITLUninit
; DIS-NEXT: b0: 00 00 00 d0
-; DIS-NEXT: 000000b0: R_POS (idx: 21) TOC[TC0]
+; DIS-NEXT: 000000b0: R_POS (idx: [[#NFA+21]]) TOC[TC0]
; DIS-NEXT: b4: 00 00 00 00
-; DIS: 000000b8 (idx: 17) loadTLInit[DS]:
+; DIS: 000000b8 (idx: [[#NFA+17]]) loadTLInit[DS]:
; DIS-NEXT: b8: 00 00 00 30
-; DIS-NEXT: 000000b8: R_POS (idx: 7) .loadTLInit
+; DIS-NEXT: 000000b8: R_POS (idx: [[#NFA+7]]) .loadTLInit
; DIS-NEXT: bc: 00 00 00 d0
-; DIS-NEXT: 000000bc: R_POS (idx: 21) TOC[TC0]
+; DIS-NEXT: 000000bc: R_POS (idx: [[#NFA+21]]) TOC[TC0]
; DIS-NEXT: c0: 00 00 00 00
-; DIS: 000000c4 (idx: 19) loadTLUninit[DS]:
+; DIS: 000000c4 (idx: [[#NFA+19]]) loadTLUninit[DS]:
; DIS-NEXT: c4: 00 00 00 70
-; DIS-NEXT: 000000c4: R_POS (idx: 9) .loadTLUninit
+; DIS-NEXT: 000000c4: R_POS (idx: [[#NFA+9]]) .loadTLUninit
; DIS-NEXT: c8: 00 00 00 d0
-; DIS-NEXT: 000000c8: R_POS (idx: 21) TOC[TC0]
+; DIS-NEXT: 000000c8: R_POS (idx: [[#NFA+21]]) TOC[TC0]
; DIS-NEXT: cc: 00 00 00 00
-; DIS: 000000d0 (idx: 23) IThreadLocalVarUninit[TC]:
+; DIS: 000000d0 (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]:
; DIS-NEXT: d0: 00 00 00 04
-; DIS-NEXT: 000000d0: R_TLS_LE (idx: 35) IThreadLocalVarUninit[UL]
-; DIS: 000000d4 (idx: 25) ThreadLocalVarInit[TC]:
+; DIS-NEXT: 000000d0: R_TLS_LE (idx: [[#NFA+35]]) IThreadLocalVarUninit[UL]
+; DIS: 000000d4 (idx: [[#NFA+25]]) ThreadLocalVarInit[TC]:
; DIS-NEXT: d4: 00 00 00 00
-; DIS-NEXT: 000000d4: R_TLS_LE (idx: 33) ThreadLocalVarInit
-; DIS: 000000d8 (idx: 27) VarInit[TC]:
+; DIS-NEXT: 000000d4: R_TLS_LE (idx: [[#NFA+33]]) ThreadLocalVarInit
+; DIS: 000000d8 (idx: [[#NFA+27]]) VarInit[TC]:
; DIS-NEXT: d8: 00 00 00 a8
-; DIS-NEXT: 000000d8: R_POS (idx: 13) VarInit
-; DIS: 000000dc (idx: 29) IThreadLocalVarUninit2[TC]:
+; DIS-NEXT: 000000d8: R_POS (idx: [[#NFA+13]]) VarInit
+; DIS: 000000dc (idx: [[#NFA+29]]) IThreadLocalVarUninit2[TC]:
; DIS-NEXT: dc: 00 00 00 08
-; DIS-NEXT: 000000dc: R_TLS_LE (idx: 37) IThreadLocalVarUninit2[UL]
+; DIS-NEXT: 000000dc: R_TLS_LE (idx: [[#NFA+37]]) IThreadLocalVarUninit2[UL]
; DIS: Disassembly of section .tdata:
-; DIS: 00000000 (idx: 33) ThreadLocalVarInit:
+; DIS: 00000000 (idx: [[#NFA+33]]) ThreadLocalVarInit:
; DIS-NEXT: 0: 00 00 00 01
; DIS: Disassembly of section .tbss:
-; DIS: 00000004 (idx: 35) IThreadLocalVarUninit[UL]:
+; DIS: 00000004 (idx: [[#NFA+35]]) IThreadLocalVarUninit[UL]:
; DIS-NEXT: ...
-; DIS: 00000008 (idx: 37) IThreadLocalVarUninit2[UL]:
+; DIS: 00000008 (idx: [[#NFA+37]]) IThreadLocalVarUninit2[UL]:
; DIS-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
index 2dae8ee96e20d..059924f392f6b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@GInit = global double 1.000000e+00, align 8
@TIInit = internal thread_local global i64 1, align 8
@@ -24,7 +24,7 @@ entry:
ret double %add
}
-; RELOC: File: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aixcoff-rs6000
; RELOC-NEXT: Arch: powerpc
; RELOC-NEXT: AddressSize: 32bit
@@ -32,7 +32,7 @@ entry:
; RELOC-NEXT: Section (index: 1) .text {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x16
-; RELOC-NEXT: Symbol: .TIInit (17)
+; RELOC-NEXT: Symbol: .TIInit ([[#NFA+17]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -40,7 +40,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1A
-; RELOC-NEXT: Symbol: TIInit (19)
+; RELOC-NEXT: Symbol: TIInit ([[#NFA+19]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -48,7 +48,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1E
-; RELOC-NEXT: Symbol: .TIInit (17)
+; RELOC-NEXT: Symbol: .TIInit ([[#NFA+17]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -56,7 +56,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x22
-; RELOC-NEXT: Symbol: TIInit (19)
+; RELOC-NEXT: Symbol: TIInit ([[#NFA+19]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -64,7 +64,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x24
-; RELOC-NEXT: Symbol: .__tls_get_addr (1)
+; RELOC-NEXT: Symbol: .__tls_get_addr ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -72,7 +72,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x4E
-; RELOC-NEXT: Symbol: .TWInit (21)
+; RELOC-NEXT: Symbol: .TWInit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -80,7 +80,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x52
-; RELOC-NEXT: Symbol: TWInit (23)
+; RELOC-NEXT: Symbol: TWInit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -88,7 +88,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x56
-; RELOC-NEXT: Symbol: .TWInit (21)
+; RELOC-NEXT: Symbol: .TWInit ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -96,7 +96,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x5A
-; RELOC-NEXT: Symbol: TWInit (23)
+; RELOC-NEXT: Symbol: TWInit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -104,7 +104,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x5C
-; RELOC-NEXT: Symbol: .__tls_get_addr (1)
+; RELOC-NEXT: Symbol: .__tls_get_addr ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -112,7 +112,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x66
-; RELOC-NEXT: Symbol: GInit (25)
+; RELOC-NEXT: Symbol: GInit ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -120,7 +120,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x6A
-; RELOC-NEXT: Symbol: GInit (25)
+; RELOC-NEXT: Symbol: GInit ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -130,7 +130,7 @@ entry:
; RELOC-NEXT: Section (index: 2) .data {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x90
-; RELOC-NEXT: Symbol: .storesTIInit (5)
+; RELOC-NEXT: Symbol: .storesTIInit ([[#NFA+5]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -138,7 +138,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x94
-; RELOC-NEXT: Symbol: TOC (15)
+; RELOC-NEXT: Symbol: TOC ([[#NFA+15]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -146,7 +146,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x9C
-; RELOC-NEXT: Symbol: .loadsTWInit (7)
+; RELOC-NEXT: Symbol: .loadsTWInit ([[#NFA+7]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -154,7 +154,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xA0
-; RELOC-NEXT: Symbol: TOC (15)
+; RELOC-NEXT: Symbol: TOC ([[#NFA+15]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -162,7 +162,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xA8
-; RELOC-NEXT: Symbol: TIInit (27)
+; RELOC-NEXT: Symbol: TIInit ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -170,7 +170,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xAC
-; RELOC-NEXT: Symbol: TIInit (27)
+; RELOC-NEXT: Symbol: TIInit ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -178,7 +178,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xB0
-; RELOC-NEXT: Symbol: TWInit (29)
+; RELOC-NEXT: Symbol: TWInit ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -186,7 +186,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xB4
-; RELOC-NEXT: Symbol: TWInit (29)
+; RELOC-NEXT: Symbol: TWInit ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -194,7 +194,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xB8
-; RELOC-NEXT: Symbol: GInit (9)
+; RELOC-NEXT: Symbol: GInit ([[#NFA+9]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -203,23 +203,33 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: ]
-; SYM: File: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aixcoff-rs6000
; SYM-NEXT: Arch: powerpc
; SYM-NEXT: AddressSize: 32bit
; SYM-NEXT: Symbols [
; SYM-NEXT: Symbol {
; SYM-NEXT: Index: 0
-; SYM-NEXT: Name: <stdin>
+; SYM-NEXT: Name: .file
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; SYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYM-NEXT: StorageClass: C_FILE (0x67)
-; SYM-NEXT: NumberOfAuxEntries: 0
+; SYM-NEXT: NumberOfAuxEntries: 2
+; SYM-NEXT: File Auxiliary Entry {
+; SYM-NEXT: Index: 1
+; SYM-NEXT: Name:
+; SYM-NEXT: Type: XFT_FN (0x0)
+; SYM-NEXT: }
+; SYM-NEXT: File Auxiliary Entry {
+; SYM-NEXT: Index: 2
+; SYM-NEXT: Name: LLVM
+; SYM-NEXT: Type: XFT_CV (0x2)
+; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 1
+; SYM-NEXT: Index: [[#NFA+1]]
; SYM-NEXT: Name: .__tls_get_addr
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -227,7 +237,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 2
+; SYM-NEXT: Index: [[#NFA+2]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -239,7 +249,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 3
+; SYM-NEXT: Index: [[#NFA+3]]
; SYM-NEXT: Name:
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -247,7 +257,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 4
+; SYM-NEXT: Index: [[#NFA+4]]
; SYM-NEXT: SectionLen: 132
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -259,7 +269,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 5
+; SYM-NEXT: Index: [[#NFA+5]]
; SYM-NEXT: Name: .storesTIInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -267,8 +277,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 6
-; SYM-NEXT: ContainingCsectSymbolIndex: 3
+; SYM-NEXT: Index: [[#NFA+6]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+3]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -279,7 +289,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 7
+; SYM-NEXT: Index: [[#NFA+7]]
; SYM-NEXT: Name: .loadsTWInit
; SYM-NEXT: Value (RelocatableAddress): 0x40
; SYM-NEXT: Section: .text
@@ -287,8 +297,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 8
-; SYM-NEXT: ContainingCsectSymbolIndex: 3
+; SYM-NEXT: Index: [[#NFA+8]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+3]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -299,7 +309,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 9
+; SYM-NEXT: Index: [[#NFA+9]]
; SYM-NEXT: Name: GInit
; SYM-NEXT: Value (RelocatableAddress): 0x88
; SYM-NEXT: Section: .data
@@ -307,7 +317,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 10
+; SYM-NEXT: Index: [[#NFA+10]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -319,7 +329,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 11
+; SYM-NEXT: Index: [[#NFA+11]]
; SYM-NEXT: Name: storesTIInit
; SYM-NEXT: Value (RelocatableAddress): 0x90
; SYM-NEXT: Section: .data
@@ -327,7 +337,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 12
+; SYM-NEXT: Index: [[#NFA+12]]
; SYM-NEXT: SectionLen: 12
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -339,7 +349,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 13
+; SYM-NEXT: Index: [[#NFA+13]]
; SYM-NEXT: Name: loadsTWInit
; SYM-NEXT: Value (RelocatableAddress): 0x9C
; SYM-NEXT: Section: .data
@@ -347,7 +357,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 14
+; SYM-NEXT: Index: [[#NFA+14]]
; SYM-NEXT: SectionLen: 12
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -359,7 +369,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 15
+; SYM-NEXT: Index: [[#NFA+15]]
; SYM-NEXT: Name: TOC
; SYM-NEXT: Value (RelocatableAddress): 0xA8
; SYM-NEXT: Section: .data
@@ -367,7 +377,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 16
+; SYM-NEXT: Index: [[#NFA+16]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -379,7 +389,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 17
+; SYM-NEXT: Index: [[#NFA+17]]
; SYM-NEXT: Name: .TIInit
; SYM-NEXT: Value (RelocatableAddress): 0xA8
; SYM-NEXT: Section: .data
@@ -387,7 +397,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 18
+; SYM-NEXT: Index: [[#NFA+18]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -399,7 +409,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 19
+; SYM-NEXT: Index: [[#NFA+19]]
; SYM-NEXT: Name: TIInit
; SYM-NEXT: Value (RelocatableAddress): 0xAC
; SYM-NEXT: Section: .data
@@ -407,7 +417,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 20
+; SYM-NEXT: Index: [[#NFA+20]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -419,7 +429,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 21
+; SYM-NEXT: Index: [[#NFA+21]]
; SYM-NEXT: Name: .TWInit
; SYM-NEXT: Value (RelocatableAddress): 0xB0
; SYM-NEXT: Section: .data
@@ -427,7 +437,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: [[#NFA+22]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -439,7 +449,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 23
+; SYM-NEXT: Index: [[#NFA+23]]
; SYM-NEXT: Name: TWInit
; SYM-NEXT: Value (RelocatableAddress): 0xB4
; SYM-NEXT: Section: .data
@@ -447,7 +457,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: [[#NFA+24]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -459,7 +469,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 25
+; SYM-NEXT: Index: [[#NFA+25]]
; SYM-NEXT: Name: GInit
; SYM-NEXT: Value (RelocatableAddress): 0xB8
; SYM-NEXT: Section: .data
@@ -467,7 +477,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 26
+; SYM-NEXT: Index: [[#NFA+26]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -479,7 +489,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 27
+; SYM-NEXT: Index: [[#NFA+27]]
; SYM-NEXT: Name: TIInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -487,7 +497,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 28
+; SYM-NEXT: Index: [[#NFA+28]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -499,7 +509,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 29
+; SYM-NEXT: Index: [[#NFA+29]]
; SYM-NEXT: Name: TWInit
; SYM-NEXT: Value (RelocatableAddress): 0x8
; SYM-NEXT: Section: .tdata
@@ -507,7 +517,7 @@ entry:
; SYM-NEXT: StorageClass: C_WEAKEXT (0x6F)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 30
+; SYM-NEXT: Index: [[#NFA+30]]
; SYM-NEXT: SectionLen: 8
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -520,49 +530,49 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: ]
-; DIS: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o: file format aixcoff-rs6000
+; DIS: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 (idx: 5) .storesTIInit:
+; DIS: 00000000 (idx: [[#INDX:]]) .storesTIInit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: mr 6, 4
; DIS-NEXT: mr 7, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 17) .TIInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+17]]) .TIInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 19) TIInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+19]]) TIInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 17) .TIInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+17]]) .TIInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 19) TIInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+19]]) TIInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__tls_get_addr[PR]
; DIS-NEXT: stw 6, 4(3)
; DIS-NEXT: stw 7, 0(3)
; DIS-NEXT: addi 1, 1, 32
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000040 (idx: 7) .loadsTWInit:
+; DIS: 00000040 (idx: [[#INDX+2]]) .loadsTWInit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) .TWInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) .TWInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 23) TWInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+23]]) TWInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 8(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) .TWInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) .TWInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 23) TWInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+23]]) TWInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__tls_get_addr[PR]
; DIS-NEXT: lfd 0, 0(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 25) GInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+25]]) GInit[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 16(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 25) GInit[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+25]]) GInit[TE]
; DIS-NEXT: lfd 1, 0(3)
; DIS-NEXT: fadd 1, 0, 1
; DIS-NEXT: addi 1, 1, 32
@@ -571,42 +581,42 @@ entry:
; DIS-NEXT: blr
; DIS: Disassembly of section .data:
-; DIS: 00000088 (idx: 9) GInit[RW]:
+; DIS: 00000088 (idx: [[#NFA+9]]) GInit[RW]:
; DIS-NEXT: 88: 3f f0 00 00
; DIS-NEXT: 8c: 00 00 00 00
-; DIS: 00000090 (idx: 11) storesTIInit[DS]:
+; DIS: 00000090 (idx: [[#NFA+11]]) storesTIInit[DS]:
; DIS-NEXT: 90: 00 00 00 00
-; DIS-NEXT: 00000090: R_POS (idx: 5) .storesTIInit
+; DIS-NEXT: 00000090: R_POS (idx: [[#NFA+5]]) .storesTIInit
; DIS-NEXT: 94: 00 00 00 a8
-; DIS-NEXT: 00000094: R_POS (idx: 15) TOC[TC0]
+; DIS-NEXT: 00000094: R_POS (idx: [[#NFA+15]]) TOC[TC0]
; DIS-NEXT: 98: 00 00 00 00
-; DIS: 0000009c (idx: 13) loadsTWInit[DS]:
+; DIS: 0000009c (idx: [[#NFA+13]]) loadsTWInit[DS]:
; DIS-NEXT: 9c: 00 00 00 40
-; DIS-NEXT: 0000009c: R_POS (idx: 7) .loadsTWInit
+; DIS-NEXT: 0000009c: R_POS (idx: [[#NFA+7]]) .loadsTWInit
; DIS-NEXT: a0: 00 00 00 a8
-; DIS-NEXT: 000000a0: R_POS (idx: 15) TOC[TC0]
+; DIS-NEXT: 000000a0: R_POS (idx: [[#NFA+15]]) TOC[TC0]
; DIS-NEXT: a4: 00 00 00 00
-; DIS: 000000a8 (idx: 17) .TIInit[TE]:
+; DIS: 000000a8 (idx: [[#NFA+17]]) .TIInit[TE]:
; DIS-NEXT: a8: 00 00 00 00
-; DIS-NEXT: 000000a8: R_TLSM (idx: 27) TIInit[TL]
-; DIS: 000000ac (idx: 19) TIInit[TE]:
+; DIS-NEXT: 000000a8: R_TLSM (idx: [[#NFA+27]]) TIInit[TL]
+; DIS: 000000ac (idx: [[#NFA+19]]) TIInit[TE]:
; DIS-NEXT: ac: 00 00 00 00
-; DIS-NEXT: 000000ac: R_TLS (idx: 27) TIInit[TL]
-; DIS: 000000b0 (idx: 21) .TWInit[TE]:
+; DIS-NEXT: 000000ac: R_TLS (idx: [[#NFA+27]]) TIInit[TL]
+; DIS: 000000b0 (idx: [[#NFA+21]]) .TWInit[TE]:
; DIS-NEXT: b0: 00 00 00 00
-; DIS-NEXT: 000000b0: R_TLSM (idx: 29) TWInit[TL]
-; DIS: 000000b4 (idx: 23) TWInit[TE]:
+; DIS-NEXT: 000000b0: R_TLSM (idx: [[#NFA+29]]) TWInit[TL]
+; DIS: 000000b4 (idx: [[#NFA+23]]) TWInit[TE]:
; DIS-NEXT: b4: 00 00 00 08
-; DIS-NEXT: 000000b4: R_TLS (idx: 29) TWInit[TL]
-; DIS: 000000b8 (idx: 25) GInit[TE]:
+; DIS-NEXT: 000000b4: R_TLS (idx: [[#NFA+29]]) TWInit[TL]
+; DIS: 000000b8 (idx: [[#NFA+25]]) GInit[TE]:
; DIS-NEXT: b8: 00 00 00 88
-; DIS-NEXT: 000000b8: R_POS (idx: 9) GInit[RW]
+; DIS-NEXT: 000000b8: R_POS (idx: [[#NFA+9]]) GInit[RW]
; DIS: Disassembly of section .tdata:
-; DIS: 00000000 (idx: 27) TIInit[TL]:
+; DIS: 00000000 (idx: [[#NFA+27]]) TIInit[TL]:
; DIS-NEXT: 0: 00 00 00 00
; DIS-NEXT: 4: 00 00 00 01
-; DIS: 00000008 (idx: 29) TWInit[TL]:
+; DIS: 00000008 (idx: [[#NFA+29]]) TWInit[TL]:
; DIS-NEXT: 8: 3f f0 00 00
; DIS-NEXT: c: 00 00 00 00
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
index 0779686b54f3a..eb7a0e277a565 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
@const_ivar = constant i32 6, align 4
@GInit = global i32 1, align 4
@@ -25,7 +25,7 @@ entry:
ret i32 %add
}
-; RELOC: File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
+; RELOC: File:
; RELOC-NEXT: Format: aixcoff-rs6000
; RELOC-NEXT: Arch: powerpc
; RELOC-NEXT: AddressSize: 32bit
@@ -33,7 +33,7 @@ entry:
; RELOC-NEXT: Section (index: 1) .text {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0xE
-; RELOC-NEXT: Symbol: .TIUninit (23)
+; RELOC-NEXT: Symbol: .TIUninit ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -41,7 +41,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x12
-; RELOC-NEXT: Symbol: TIUninit (25)
+; RELOC-NEXT: Symbol: TIUninit ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -49,7 +49,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x18
-; RELOC-NEXT: Symbol: .__tls_get_addr (1)
+; RELOC-NEXT: Symbol: .__tls_get_addr ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -57,7 +57,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x3A
-; RELOC-NEXT: Symbol: .TGInit (27)
+; RELOC-NEXT: Symbol: .TGInit ([[#NFA+27]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -65,7 +65,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x3E
-; RELOC-NEXT: Symbol: TGInit (29)
+; RELOC-NEXT: Symbol: TGInit ([[#NFA+29]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -73,7 +73,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x44
-; RELOC-NEXT: Symbol: .__tls_get_addr (1)
+; RELOC-NEXT: Symbol: .__tls_get_addr ([[#NFA+1]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -81,7 +81,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x4A
-; RELOC-NEXT: Symbol: GInit (31)
+; RELOC-NEXT: Symbol: GInit ([[#NFA+31]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -91,7 +91,7 @@ entry:
; RELOC-NEXT: Section (index: 2) .data {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x70
-; RELOC-NEXT: Symbol: .storesTIUninit (5)
+; RELOC-NEXT: Symbol: .storesTIUninit ([[#NFA+5]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -99,7 +99,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x74
-; RELOC-NEXT: Symbol: TOC (21)
+; RELOC-NEXT: Symbol: TOC ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -107,7 +107,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x7C
-; RELOC-NEXT: Symbol: .loadsTGInit (7)
+; RELOC-NEXT: Symbol: .loadsTGInit ([[#NFA+7]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -115,7 +115,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x80
-; RELOC-NEXT: Symbol: TOC (21)
+; RELOC-NEXT: Symbol: TOC ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -123,7 +123,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x88
-; RELOC-NEXT: Symbol: TIUninit (37)
+; RELOC-NEXT: Symbol: TIUninit ([[#NFA+37]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -131,7 +131,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x8C
-; RELOC-NEXT: Symbol: TIUninit (37)
+; RELOC-NEXT: Symbol: TIUninit ([[#NFA+37]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -139,7 +139,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x90
-; RELOC-NEXT: Symbol: TGInit (35)
+; RELOC-NEXT: Symbol: TGInit ([[#NFA+35]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -147,7 +147,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x94
-; RELOC-NEXT: Symbol: TGInit (35)
+; RELOC-NEXT: Symbol: TGInit ([[#NFA+35]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -155,7 +155,7 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x98
-; RELOC-NEXT: Symbol: GInit (15)
+; RELOC-NEXT: Symbol: GInit ([[#NFA+15]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -164,23 +164,22 @@ entry:
; RELOC-NEXT: }
; RELOC-NEXT: ]
-; SYM: File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
+; SYM: File:
; SYM-NEXT: Format: aixcoff-rs6000
; SYM-NEXT: Arch: powerpc
; SYM-NEXT: AddressSize: 32bit
; SYM-NEXT: Symbols [
; SYM-NEXT: Symbol {
; SYM-NEXT: Index: 0
-; SYM-NEXT: Name: <stdin>
+; SYM-NEXT: Name: .file
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; SYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYM-NEXT: StorageClass: C_FILE (0x67)
-; SYM-NEXT: NumberOfAuxEntries: 0
-; SYM-NEXT: }
-; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 1
+; SYM-NEXT: NumberOfAuxEntries: 2
+; SYM: Symbol {
+; SYM-NEXT: Index: [[#NFA+1]]
; SYM-NEXT: Name: .__tls_get_addr
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -188,7 +187,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 2
+; SYM-NEXT: Index: [[#NFA+2]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -200,7 +199,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 3
+; SYM-NEXT: Index: [[#NFA+3]]
; SYM-NEXT: Name:
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -208,7 +207,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 4
+; SYM-NEXT: Index: [[#NFA+4]]
; SYM-NEXT: SectionLen: 104
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -220,7 +219,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 5
+; SYM-NEXT: Index: [[#NFA+5]]
; SYM-NEXT: Name: .storesTIUninit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -228,8 +227,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 6
-; SYM-NEXT: ContainingCsectSymbolIndex: 3
+; SYM-NEXT: Index: [[#NFA+6]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+3]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -240,7 +239,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 7
+; SYM-NEXT: Index: [[#NFA+7]]
; SYM-NEXT: Name: .loadsTGInit
; SYM-NEXT: Value (RelocatableAddress): 0x30
; SYM-NEXT: Section: .text
@@ -248,8 +247,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 8
-; SYM-NEXT: ContainingCsectSymbolIndex: 3
+; SYM-NEXT: Index: [[#NFA+8]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+3]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -260,7 +259,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 9
+; SYM-NEXT: Index: [[#NFA+9]]
; SYM-NEXT: Name: .rodata
; SYM-NEXT: Value (RelocatableAddress): 0x68
; SYM-NEXT: Section: .text
@@ -268,7 +267,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 10
+; SYM-NEXT: Index: [[#NFA+10]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -280,7 +279,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 11
+; SYM-NEXT: Index: [[#NFA+11]]
; SYM-NEXT: Name: const_ivar
; SYM-NEXT: Value (RelocatableAddress): 0x68
; SYM-NEXT: Section: .text
@@ -288,8 +287,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 12
-; SYM-NEXT: ContainingCsectSymbolIndex: 9
+; SYM-NEXT: Index: [[#NFA+12]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+9]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -300,7 +299,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 13
+; SYM-NEXT: Index: [[#NFA+13]]
; SYM-NEXT: Name: .data
; SYM-NEXT: Value (RelocatableAddress): 0x6C
; SYM-NEXT: Section: .data
@@ -308,7 +307,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 14
+; SYM-NEXT: Index: [[#NFA+14]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -320,7 +319,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 15
+; SYM-NEXT: Index: [[#NFA+15]]
; SYM-NEXT: Name: GInit
; SYM-NEXT: Value (RelocatableAddress): 0x6C
; SYM-NEXT: Section: .data
@@ -328,8 +327,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 16
-; SYM-NEXT: ContainingCsectSymbolIndex: 13
+; SYM-NEXT: Index: [[#NFA+16]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+13]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -340,7 +339,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 17
+; SYM-NEXT: Index: [[#NFA+17]]
; SYM-NEXT: Name: storesTIUninit
; SYM-NEXT: Value (RelocatableAddress): 0x70
; SYM-NEXT: Section: .data
@@ -348,7 +347,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 18
+; SYM-NEXT: Index: [[#NFA+18]]
; SYM-NEXT: SectionLen: 12
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -360,7 +359,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 19
+; SYM-NEXT: Index: [[#NFA+19]]
; SYM-NEXT: Name: loadsTGInit
; SYM-NEXT: Value (RelocatableAddress): 0x7C
; SYM-NEXT: Section: .data
@@ -368,7 +367,7 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 20
+; SYM-NEXT: Index: [[#NFA+20]]
; SYM-NEXT: SectionLen: 12
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -380,7 +379,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 21
+; SYM-NEXT: Index: [[#NFA+21]]
; SYM-NEXT: Name: TOC
; SYM-NEXT: Value (RelocatableAddress): 0x88
; SYM-NEXT: Section: .data
@@ -388,7 +387,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: [[#NFA+22]]
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -400,7 +399,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 23
+; SYM-NEXT: Index: [[#NFA+23]]
; SYM-NEXT: Name: .TIUninit
; SYM-NEXT: Value (RelocatableAddress): 0x88
; SYM-NEXT: Section: .data
@@ -408,7 +407,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: [[#NFA+24]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -420,7 +419,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 25
+; SYM-NEXT: Index: [[#NFA+25]]
; SYM-NEXT: Name: TIUninit
; SYM-NEXT: Value (RelocatableAddress): 0x8C
; SYM-NEXT: Section: .data
@@ -428,7 +427,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 26
+; SYM-NEXT: Index: [[#NFA+26]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -440,7 +439,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 27
+; SYM-NEXT: Index: [[#NFA+27]]
; SYM-NEXT: Name: .TGInit
; SYM-NEXT: Value (RelocatableAddress): 0x90
; SYM-NEXT: Section: .data
@@ -448,7 +447,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 28
+; SYM-NEXT: Index: [[#NFA+28]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -460,7 +459,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 29
+; SYM-NEXT: Index: [[#NFA+29]]
; SYM-NEXT: Name: TGInit
; SYM-NEXT: Value (RelocatableAddress): 0x94
; SYM-NEXT: Section: .data
@@ -468,7 +467,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 30
+; SYM-NEXT: Index: [[#NFA+30]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -480,7 +479,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 31
+; SYM-NEXT: Index: [[#NFA+31]]
; SYM-NEXT: Name: GInit
; SYM-NEXT: Value (RelocatableAddress): 0x98
; SYM-NEXT: Section: .data
@@ -488,7 +487,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 32
+; SYM-NEXT: Index: [[#NFA+32]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -500,7 +499,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 33
+; SYM-NEXT: Index: [[#NFA+33]]
; SYM-NEXT: Name: .tdata
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -508,7 +507,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 34
+; SYM-NEXT: Index: [[#NFA+34]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -520,7 +519,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 35
+; SYM-NEXT: Index: [[#NFA+35]]
; SYM-NEXT: Name: TGInit
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .tdata
@@ -528,8 +527,8 @@ entry:
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 36
-; SYM-NEXT: ContainingCsectSymbolIndex: 33
+; SYM-NEXT: Index: [[#NFA+36]]
+; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+33]]
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -540,7 +539,7 @@ entry:
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 37
+; SYM-NEXT: Index: [[#NFA+37]]
; SYM-NEXT: Name: TIUninit
; SYM-NEXT: Value (RelocatableAddress): 0x4
; SYM-NEXT: Section: .tbss
@@ -548,7 +547,7 @@ entry:
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 38
+; SYM-NEXT: Index: [[#NFA+38]]
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -563,34 +562,34 @@ entry:
; DIS: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 (idx: 5) .storesTIUninit:
+; DIS: 00000000 (idx: [[#NFA+5]]) .storesTIUninit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: mr 6, 3
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) .TIUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) .TIUninit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) TIUninit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+25]]) TIUninit[TC]
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__tls_get_addr[PR]
; DIS-NEXT: stw 6, 0(3)
; DIS-NEXT: addi 1, 1, 32
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000030 (idx: 7) .loadsTGInit:
+; DIS: 00000030 (idx: [[#NFA+7]]) .loadsTGInit:
; DIS-NEXT: mflr 0
; DIS-NEXT: stwu 1, -32(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 8(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) .TGInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+27]]) .TGInit[TC]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 29) TGInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+29]]) TGInit[TC]
; DIS-NEXT: stw 0, 40(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__tls_get_addr[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 16(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 31) GInit[TC]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+31]]) GInit[TC]
; DIS-NEXT: lwz 3, 0(3)
; DIS-NEXT: lwz 4, 0(4)
; DIS-NEXT: add 3, 4, 3
@@ -598,46 +597,46 @@ entry:
; DIS-NEXT: lwz 0, 8(1)
; DIS-NEXT: mtlr 0
; DIS-NEXT: blr
-; DIS: 00000068 (idx: 11) const_ivar:
+; DIS: 00000068 (idx: [[#NFA+11]]) const_ivar:
; DIS-NEXT: 68: 00 00 00 06
; DIS: Disassembly of section .data:
-; DIS: 0000006c (idx: 15) GInit:
+; DIS: 0000006c (idx: [[#NFA+15]]) GInit:
; DIS-NEXT: 6c: 00 00 00 01
-; DIS: 00000070 (idx: 17) storesTIUninit[DS]:
+; DIS: 00000070 (idx: [[#NFA+17]]) storesTIUninit[DS]:
; DIS-NEXT: 70: 00 00 00 00
-; DIS-NEXT: 00000070: R_POS (idx: 5) .storesTIUninit
+; DIS-NEXT: 00000070: R_POS (idx: [[#NFA+5]]) .storesTIUninit
; DIS-NEXT: 74: 00 00 00 88
-; DIS-NEXT: 00000074: R_POS (idx: 21) TOC[TC0]
+; DIS-NEXT: 00000074: R_POS (idx: [[#NFA+21]]) TOC[TC0]
; DIS-NEXT: 78: 00 00 00 00
-; DIS: 0000007c (idx: 19) loadsTGInit[DS]:
+; DIS: 0000007c (idx: [[#NFA+19]]) loadsTGInit[DS]:
; DIS-NEXT: 7c: 00 00 00 30
-; DIS-NEXT: 0000007c: R_POS (idx: 7) .loadsTGInit
+; DIS-NEXT: 0000007c: R_POS (idx: [[#NFA+7]]) .loadsTGInit
; DIS-NEXT: 80: 00 00 00 88
-; DIS-NEXT: 00000080: R_POS (idx: 21) TOC[TC0]
+; DIS-NEXT: 00000080: R_POS (idx: [[#NFA+21]]) TOC[TC0]
; DIS-NEXT: 84: 00 00 00 00
-; DIS: 00000088 (idx: 23) .TIUninit[TC]:
+; DIS: 00000088 (idx: [[#NFA+23]]) .TIUninit[TC]:
; DIS-NEXT: 88: 00 00 00 00
-; DIS-NEXT: 00000088: R_TLSM (idx: 37) TIUninit[UL]
-; DIS: 0000008c (idx: 25) TIUninit[TC]:
+; DIS-NEXT: 00000088: R_TLSM (idx: [[#NFA+37]]) TIUninit[UL]
+; DIS: 0000008c (idx: [[#NFA+25]]) TIUninit[TC]:
; DIS-NEXT: 8c: 00 00 00 04
-; DIS-NEXT: 0000008c: R_TLS (idx: 37) TIUninit[UL]
-; DIS: 00000090 (idx: 27) .TGInit[TC]:
+; DIS-NEXT: 0000008c: R_TLS (idx: [[#NFA+37]]) TIUninit[UL]
+; DIS: 00000090 (idx: [[#NFA+27]]) .TGInit[TC]:
; DIS-NEXT: 90: 00 00 00 00
-; DIS-NEXT: 00000090: R_TLSM (idx: 35) TGInit
-; DIS: 00000094 (idx: 29) TGInit[TC]:
+; DIS-NEXT: 00000090: R_TLSM (idx: [[#NFA+35]]) TGInit
+; DIS: 00000094 (idx: [[#NFA+29]]) TGInit[TC]:
; DIS-NEXT: 94: 00 00 00 00
-; DIS-NEXT: 00000094: R_TLS (idx: 35) TGInit
-; DIS: 00000098 (idx: 31) GInit[TC]:
+; DIS-NEXT: 00000094: R_TLS (idx: [[#NFA+35]]) TGInit
+; DIS: 00000098 (idx: [[#NFA+31]]) GInit[TC]:
; DIS-NEXT: 98: 00 00 00 6c
-; DIS-NEXT: 00000098: R_POS (idx: 15) GInit
+; DIS-NEXT: 00000098: R_POS (idx: [[#NFA+15]]) GInit
; DIS: Disassembly of section .tdata:
-; DIS: 00000000 (idx: 35) TGInit:
+; DIS: 00000000 (idx: [[#NFA+35]]) TGInit:
; DIS-NEXT: 0: 00 00 00 01
; DIS: Disassembly of section .tbss:
-; DIS: 00000004 (idx: 37) TIUninit[UL]:
+; DIS: 00000004 (idx: [[#NFA+37]]) TIUninit[UL]:
; DIS-NEXT: ...
attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
index 3bbdadcdb7bae..f9a1a61617761 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
@@ -3,16 +3,16 @@
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers %t.o | FileCheck --check-prefix=SECTION %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYMS,SYMS-DATASECT %s
-; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefixes=OBJDUMP-DATASECT %s
+; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefixes=OBJDUMP-DATASECT %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers %t.o | FileCheck --check-prefix=SECTION %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYMS,SYMS-NODATASECT %s
-; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefixes=OBJDUMP-NODATASECT %s
+; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefixes=OBJDUMP-NODATASECT %s
;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
-; SECTION: File: {{.*}}aix-tls-xcoff-variables.ll.tmp.o
+; SECTION: File:
; SECTION-NEXT: Format: aixcoff-rs6000
; SECTION-NEXT: Arch: powerpc
; SECTION-NEXT: AddressSize: 32bit
@@ -59,22 +59,21 @@
; SECTION-NEXT: ]
-; SYMS: File: {{.*}}aix-tls-xcoff-variables.ll.tmp.o
+; SYMS: File:
; SYMS-NEXT: Format: aixcoff-rs6000
; SYMS-NEXT: Arch: powerpc
; SYMS-NEXT: AddressSize: 32bit
; SYMS-NEXT: Symbols [
; SYMS-NEXT: Symbol {
; SYMS-NEXT: Index: 0
-; SYMS-NEXT: Name: <stdin>
+; SYMS-NEXT: Name: .file
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; SYMS-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
-; SYMS-NEXT: NumberOfAuxEntries: 0
-; SYMS-NEXT: }
-; SYMS-NEXT: Symbol {
+; SYMS-NEXT: NumberOfAuxEntries: 2
+; SYMS: Symbol {
; SYMS-NEXT: Index: [[#INDX:]]
; SYMS-NEXT: Name: tls_global_int_external_uninitialized
; SYMS-NEXT: Value (RelocatableAddress): 0x0
@@ -531,100 +530,100 @@
; OBJDUMP-DATASECT: Disassembly of section .text:
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000000 (idx: 7) const_ivar[RO]:
+; OBJDUMP-DATASECT-NEXT: 00000000 (idx: [[#NFA+7]]) const_ivar[RO]:
; OBJDUMP-DATASECT-NEXT: 0: 00 00 00 06 <unknown>
; OBJDUMP-DATASECT-EMPTY:
; OBJDUMP-DATASECT-NEXT: Disassembly of section .tdata:
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000000 (idx: 11) tls_global_alias_int_external_val_initialized:
+; OBJDUMP-DATASECT-NEXT: 00000000 (idx: [[#NFA+11]]) tls_global_alias_int_external_val_initialized:
; OBJDUMP-DATASECT-NEXT: 0: 00 00 00 01 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000004 (idx: 13) tls_global_int_external_zero_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000004 (idx: [[#NFA+13]]) tls_global_int_external_zero_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: 4: 00 00 00 00 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000008 (idx: 15) tls_global_int_local_val_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000008 (idx: [[#NFA+15]]) tls_global_int_local_val_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: 8: 00 00 00 02 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 0000000c (idx: 17) tls_global_int_weak_zero_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 0000000c (idx: [[#NFA+17]]) tls_global_int_weak_zero_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: c: 00 00 00 00 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000010 (idx: 19) tls_global_int_weak_val_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000010 (idx: [[#NFA+19]]) tls_global_int_weak_val_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: 10: 00 00 00 01 <unknown>
; OBJDUMP-DATASECT-NEXT: 14: 00 00 00 00 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000018 (idx: 21) tls_global_long_long_internal_val_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000018 (idx: [[#NFA+21]]) tls_global_long_long_internal_val_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: 18: 00 00 00 00 <unknown>
; OBJDUMP-DATASECT-NEXT: 1c: 00 00 00 01 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000020 (idx: 23) tls_global_long_long_weak_val_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000020 (idx: [[#NFA+23]]) tls_global_long_long_weak_val_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: 20: 00 00 00 00 <unknown>
; OBJDUMP-DATASECT-NEXT: 24: 00 00 00 01 <unknown>
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000028 (idx: 25) tls_global_long_long_weak_zero_initialized[TL]:
+; OBJDUMP-DATASECT-NEXT: 00000028 (idx: [[#NFA+25]]) tls_global_long_long_weak_zero_initialized[TL]:
; OBJDUMP-DATASECT-NEXT: ...
; OBJDUMP-DATASECT-EMPTY:
; OBJDUMP-DATASECT-NEXT: Disassembly of section .tbss:
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000030 (idx: 27) tls_global_int_local_zero_initialized[UL]:
+; OBJDUMP-DATASECT-NEXT: 00000030 (idx: [[#NFA+27]]) tls_global_int_local_zero_initialized[UL]:
; OBJDUMP-DATASECT-NEXT: ...
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000034 (idx: 29) tls_global_int_common_zero_initialized[UL]:
+; OBJDUMP-DATASECT-NEXT: 00000034 (idx: [[#NFA+29]]) tls_global_int_common_zero_initialized[UL]:
; OBJDUMP-DATASECT-NEXT: ...
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000038 (idx: 31) tls_global_double_common_zero_initialized[UL]
+; OBJDUMP-DATASECT-NEXT: 00000038 (idx: [[#NFA+31]]) tls_global_double_common_zero_initialized[UL]
; OBJDUMP-DATASECT-NEXT: ...
; OBJDUMP-DATASECT-EMPTY:
-; OBJDUMP-DATASECT-NEXT: 00000040 (idx: 33) tls_global_long_long_internal_zero_initialized[UL]:
+; OBJDUMP-DATASECT-NEXT: 00000040 (idx: [[#NFA+33]]) tls_global_long_long_internal_zero_initialized[UL]:
; OBJDUMP-DATASECT-NEXT: ...
; OBJDUMP-NODATASECT: Disassembly of section .text:
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000000 (idx: 9) const_ivar:
+; OBJDUMP-NODATASECT-NEXT: 00000000 (idx: [[#NFA+9]]) const_ivar:
; OBJDUMP-NODATASECT-NEXT: 0: 00 00 00 06 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
; OBJDUMP-NODATASECT-NEXT: Disassembly of section .tdata:
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT: 00000000 (idx: 13) tls_global_int_external_val_initialized:
+; OBJDUMP-NODATASECT: 00000000 (idx: [[#NFA+13]]) tls_global_int_external_val_initialized:
; OBJDUMP-NODATASECT-NEXT: 0: 00 00 00 01 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000004 (idx: 17) tls_global_int_external_zero_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000004 (idx: [[#NFA+17]]) tls_global_int_external_zero_initialized:
; OBJDUMP-NODATASECT-NEXT: 4: 00 00 00 00 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000008 (idx: 19) tls_global_int_local_val_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000008 (idx: [[#NFA+19]]) tls_global_int_local_val_initialized:
; OBJDUMP-NODATASECT-NEXT: 8: 00 00 00 02 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 0000000c (idx: 21) tls_global_int_weak_zero_initialized:
+; OBJDUMP-NODATASECT-NEXT: 0000000c (idx: [[#NFA+21]]) tls_global_int_weak_zero_initialized:
; OBJDUMP-NODATASECT-NEXT: c: 00 00 00 00 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000010 (idx: 23) tls_global_int_weak_val_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000010 (idx: [[#NFA+23]]) tls_global_int_weak_val_initialized:
; OBJDUMP-NODATASECT-NEXT: 10: 00 00 00 01 <unknown>
; OBJDUMP-NODATASECT-NEXT: 14: 00 00 00 00 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000018 (idx: 25) tls_global_long_long_internal_val_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000018 (idx: [[#NFA+25]]) tls_global_long_long_internal_val_initialized:
; OBJDUMP-NODATASECT-NEXT: 18: 00 00 00 00 <unknown>
; OBJDUMP-NODATASECT-NEXT: 1c: 00 00 00 01 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000020 (idx: 27) tls_global_long_long_weak_val_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000020 (idx: [[#NFA+27]]) tls_global_long_long_weak_val_initialized:
; OBJDUMP-NODATASECT-NEXT: 20: 00 00 00 00 <unknown>
; OBJDUMP-NODATASECT-NEXT: 24: 00 00 00 01 <unknown>
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000028 (idx: 29) tls_global_long_long_weak_zero_initialized:
+; OBJDUMP-NODATASECT-NEXT: 00000028 (idx: [[#NFA+29]]) tls_global_long_long_weak_zero_initialized:
; OBJDUMP-NODATASECT-NEXT: ...
; OBJDUMP-NODATASECT-EMPTY:
; OBJDUMP-NODATASECT-NEXT: Disassembly of section .tbss:
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000030 (idx: 31) tls_global_int_local_zero_initialized[UL]:
+; OBJDUMP-NODATASECT-NEXT: 00000030 (idx: [[#NFA+31]]) tls_global_int_local_zero_initialized[UL]:
; OBJDUMP-NODATASECT-NEXT: ...
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000034 (idx: 33) tls_global_int_common_zero_initialized[UL]:
+; OBJDUMP-NODATASECT-NEXT: 00000034 (idx: [[#NFA+33]]) tls_global_int_common_zero_initialized[UL]:
; OBJDUMP-NODATASECT-NEXT: ...
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000038 (idx: 35) tls_global_double_common_zero_initialized[UL]:
+; OBJDUMP-NODATASECT-NEXT: 00000038 (idx: [[#NFA+35]]) tls_global_double_common_zero_initialized[UL]:
; OBJDUMP-NODATASECT-NEXT: ...
; OBJDUMP-NODATASECT-EMPTY:
-; OBJDUMP-NODATASECT-NEXT: 00000040 (idx: 37) tls_global_long_long_internal_zero_initialized[UL]:
+; OBJDUMP-NODATASECT-NEXT: 00000040 (idx: [[#NFA+37]]) tls_global_long_long_internal_zero_initialized[UL]:
; OBJDUMP-NODATASECT-NEXT: ...
@tls_global_int_external_val_initialized = thread_local global i32 1, align 4
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
index 6891637b8fcbf..4f1735a743554 100644
--- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -1,12 +1,12 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -xcoff-traceback-table=false -o %t.o < %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=32-SYM %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 \
; RUN: --check-prefix=32-REL %s
-; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s
+; RUN: llvm-objdump -D %t.o | FileCheck -D#NFA=2 --check-prefix=32-DIS %s
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff \
; RUN: -mcpu=pwr4 -mattr=-altivec < %s | FileCheck %s
@@ -45,7 +45,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-SYM-NEXT: StorageClass: C_EXT (0x2)
; 32-SYM-NEXT: NumberOfAuxEntries: 1
; 32-SYM-NEXT: CSECT Auxiliary Entry {
-; 32-SYM-NEXT: Index: 2
+; 32-SYM-NEXT: Index: [[#NFA+2]]
; 32-SYM-NEXT: SectionLen: 0
; 32-SYM-NEXT: ParameterHashIndex: 0x0
; 32-SYM-NEXT: TypeChkSectNum: 0x0
@@ -64,8 +64,8 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-SYM-NEXT: StorageClass: C_EXT (0x2)
; 32-SYM-NEXT: NumberOfAuxEntries: 1
; 32-SYM-NEXT: CSECT Auxiliary Entry {
-; 32-SYM-NEXT: Index: 6
-; 32-SYM-NEXT: ContainingCsectSymbolIndex: 3
+; 32-SYM-NEXT: Index: [[#NFA+6]]
+; 32-SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+3]]
; 32-SYM-NEXT: ParameterHashIndex: 0x0
; 32-SYM-NEXT: TypeChkSectNum: 0x0
; 32-SYM-NEXT: SymbolAlignmentLog2: 0
@@ -82,7 +82,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-REL-NEXT: Section (index: 1) .text {
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x1C
-; 32-REL-NEXT: Symbol: .___memmove (1)
+; 32-REL-NEXT: Symbol: .___memmove ([[#NFA+1]])
; 32-REL-NEXT: IsSigned: Yes
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 26
@@ -92,7 +92,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-REL-NEXT: Section (index: 2) .data {
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x34
-; 32-REL-NEXT: Symbol: .memcpy (5)
+; 32-REL-NEXT: Symbol: .memcpy ([[#NFA+5]])
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -100,7 +100,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x38
-; 32-REL-NEXT: Symbol: TOC (13)
+; 32-REL-NEXT: Symbol: TOC ([[#NFA+13]])
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -108,7 +108,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x40
-; 32-REL-NEXT: Symbol: .call_memcpy (7)
+; 32-REL-NEXT: Symbol: .call_memcpy ([[#NFA+7]])
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -116,7 +116,7 @@ declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture reado
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x44
-; 32-REL-NEXT: Symbol: TOC (13)
+; 32-REL-NEXT: Symbol: TOC ([[#NFA+13]])
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 84ef83a9b9661..7bf80ad19e9e0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -100,16 +100,15 @@ entry:
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: 0
-; CHECKSYM-NEXT: Name: <stdin>
+; CHECKSYM-NEXT: Name: .file
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
-; CHECKSYM-NEXT: NumberOfAuxEntries: 0
-; CHECKSYM-NEXT: }
-; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: NumberOfAuxEntries: 2
+; CHECKSYM: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name:
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
index db6071653b6bc..6464257c6f266 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
@@ -2,7 +2,7 @@
; RUN: llvm-objdump --syms %t.o | FileCheck %s
; CHECK: SYMBOL TABLE:
-; CHECK-NEXT: 0000000000000000 df *DEBUG* 0000000000000000 <stdin>
+; CHECK-NEXT: 0000000000000000 df *DEBUG* 0000000000000000 .file
; CHECK-NEXT: 0000000000000000 l .text 000000000000001e
; CHECK-NEXT: 0000000000000000 g F .text (csect: ) 0000000000000000 .cold_fun
; CHECK-NEXT: 0000000000000020 g O .data 0000000000000018 cold_fun
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
index 9072e98aecb24..19c623c502132 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
@@ -5,7 +5,7 @@
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -filetype=obj -data-sections -xcoff-traceback-table=false -o %t.o < %s
-; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
+; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -s %t.o | FileCheck --check-prefix=CHECKSYM %s
;; Test to see if the default is correct for -data-sections on AIX.
@@ -16,7 +16,7 @@
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
-; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
+; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -s %t.o | FileCheck --check-prefix=CHECKSYM %s
;; Test to see if the default is correct for -data-sections on AIX.
@@ -28,7 +28,7 @@
; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
-; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s
+; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -s %t.o | FileCheck --check-prefix=CHECKSYM %s
@ivar = local_unnamed_addr global i32 35, align 4
@@ -90,50 +90,50 @@ entry:
; CHECK-NEXT: L..C3:
; CHECK-NEXT: .tc f[TC],f[RW]
-; CHECKOBJ: 00000038 (idx: 7) const_ivar[RO]:
+; CHECKOBJ: 00000038 (idx: [[#NFA+7]]) const_ivar[RO]:
; CHECKOBJ-NEXT: 38: 00 00 00 23 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000003c (idx: 9) L...str[RO]:
+; CHECKOBJ-NEXT: 0000003c (idx: [[#NFA+9]]) L...str[RO]:
; CHECKOBJ-NEXT: 3c: 61 62 63 64
; CHECKOBJ-NEXT: 40: 65 66 67 68
; CHECKOBJ-NEXT: 44: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .data:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000048 (idx: 11) ivar[RW]:
+; CHECKOBJ-NEXT: 00000048 (idx: [[#NFA+11]]) ivar[RW]:
; CHECKOBJ-NEXT: 48: 00 00 00 23 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000004c (idx: 13) p[RW]:
+; CHECKOBJ-NEXT: 0000004c (idx: [[#NFA+13]]) p[RW]:
; CHECKOBJ-NEXT: 4c: 00 00 00 3c <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000050 (idx: 15) foo[DS]:
+; CHECKOBJ-NEXT: 00000050 (idx: [[#NFA+15]]) foo[DS]:
; CHECKOBJ-NEXT: 50: 00 00 00 00 <unknown>
; CHECKOBJ-NEXT: 54: 00 00 00 68 <unknown>
; CHECKOBJ-NEXT: 58: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000005c (idx: 17) bar[DS]:
+; CHECKOBJ-NEXT: 0000005c (idx: [[#NFA+17]]) bar[DS]:
; CHECKOBJ-NEXT: 5c: 00 00 00 10 <unknown>
; CHECKOBJ-NEXT: 60: 00 00 00 68 <unknown>
; CHECKOBJ-NEXT: 64: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000068 (idx: 21) p[TC]:
+; CHECKOBJ-NEXT: 00000068 (idx: [[#NFA+21]]) p[TC]:
; CHECKOBJ-NEXT: 68: 00 00 00 4c <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000006c (idx: 23) ivar[TC]:
+; CHECKOBJ-NEXT: 0000006c (idx: [[#NFA+23]]) ivar[TC]:
; CHECKOBJ-NEXT: 6c: 00 00 00 48 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000070 (idx: 25) a[TC]:
+; CHECKOBJ-NEXT: 00000070 (idx: [[#NFA+25]]) a[TC]:
; CHECKOBJ-NEXT: 70: 00 00 00 78 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000074 (idx: 27) f[TC]:
+; CHECKOBJ-NEXT: 00000074 (idx: [[#NFA+27]]) f[TC]:
; CHECKOBJ-NEXT: 74: 00 00 00 7c <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .bss:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000078 (idx: 29) a[RW]:
+; CHECKOBJ-NEXT: 00000078 (idx: [[#NFA+29]]) a[RW]:
; CHECKOBJ-NEXT: ...
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000007c (idx: 31) f[RW]:
+; CHECKOBJ-NEXT: 0000007c (idx: [[#NFA+31]]) f[RW]:
; CHECKOBJ-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index 58958e399cb08..de937386b8b7d 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -147,7 +147,7 @@
; CHECK-NEXT: .comm over_aligned_comm[RW],8,5
; CHECK-NEXT: .comm array[RW],33,0
-; OBJ: File: {{.*}}aix-xcoff-data.ll.tmp.o
+; OBJ: File:
; OBJ-NEXT: Format: aixcoff-rs6000
; OBJ-NEXT: Arch: powerpc
; OBJ-NEXT: AddressSize: 32bit
@@ -156,7 +156,7 @@
; OBJ-NEXT: NumberOfSections: 3
; OBJ-NEXT: TimeStamp:
; OBJ-NEXT: SymbolTableOffset: 0x10C
-; OBJ-NEXT: SymbolTableEntries: 45
+; OBJ-NEXT: SymbolTableEntries: 47
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -208,14 +208,26 @@
; SYMS: Symbols [
; SYMS-NEXT: Symbol {
; SYMS-NEXT: Index: 0
-; SYMS-NEXT: Name: <stdin>
+; SYMS-NEXT: Name: .file
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; SYMS32-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYMS64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
-; SYMS-NEXT: NumberOfAuxEntries: 0
+; SYMS-NEXT: NumberOfAuxEntries: 2
+; SYMS-NEXT: File Auxiliary Entry {
+; SYMS-NEXT: Index: 1
+; SYMS-NEXT: Name:
+; SYMS-NEXT: Type: XFT_FN (0x0)
+; SYMS64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; SYMS-NEXT: }
+; SYMS-NEXT: File Auxiliary Entry {
+; SYMS-NEXT: Index: 2
+; SYMS-NEXT: Name: LLVM
+; SYMS-NEXT: Type: XFT_CV (0x2)
+; SYMS64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; SYMS-NEXT: }
; SYMS-NEXT: }
; SYMS-NEXT: Symbol {
; SYMS-NEXT: Index: [[#INDX:]]
@@ -710,7 +722,7 @@
; OBJ64-NEXT: NumberOfSections: 3
; OBJ64-NEXT: TimeStamp: None (0x0)
; OBJ64-NEXT: SymbolTableOffset: 0x170
-; OBJ64-NEXT: SymbolTableEntries: 45
+; OBJ64-NEXT: SymbolTableEntries: 47
; OBJ64-NEXT: OptionalHeaderSize: 0x0
; OBJ64-NEXT: Flags: 0x0
; OBJ64-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
index 01d0aa9e173f9..bc6e9f3501982 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
@@ -47,7 +47,7 @@ define dso_local void @test__trap_annotation_debug(i32 %a) !dbg !4 {
; SYMS32-NEXT: }
; SYMS32-NEXT: CSECT Auxiliary Entry {
; SYMS32-NEXT: Index: [[#IND+2]]
-; SYMS32-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS32-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS32-NEXT: ParameterHashIndex: 0x0
; SYMS32-NEXT: TypeChkSectNum: 0x0
; SYMS32-NEXT: SymbolAlignmentLog2: 0
@@ -74,7 +74,7 @@ define dso_local void @test__trap_annotation_debug(i32 %a) !dbg !4 {
; SYMS32-NEXT: }
; SYMS32-NEXT: CSECT Auxiliary Entry {
; SYMS32-NEXT: Index: [[#IND+5]]
-; SYMS32-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS32-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS32-NEXT: ParameterHashIndex: 0x0
; SYMS32-NEXT: TypeChkSectNum: 0x0
; SYMS32-NEXT: SymbolAlignmentLog2: 0
@@ -107,7 +107,7 @@ define dso_local void @test__trap_annotation_debug(i32 %a) !dbg !4 {
; SYMS64-NEXT: }
; SYMS64-NEXT: CSECT Auxiliary Entry {
; SYMS64-NEXT: Index: [[#IND+3]]
-; SYMS64-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS64-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS64-NEXT: ParameterHashIndex: 0x0
; SYMS64-NEXT: TypeChkSectNum: 0x0
; SYMS64-NEXT: SymbolAlignmentLog2: 0
@@ -140,7 +140,7 @@ define dso_local void @test__trap_annotation_debug(i32 %a) !dbg !4 {
; SYMS64-NEXT: }
; SYMS64-NEXT: CSECT Auxiliary Entry {
; SYMS64-NEXT: Index: [[#IND+7]]
-; SYMS64-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS64-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS64-NEXT: ParameterHashIndex: 0x0
; SYMS64-NEXT: TypeChkSectNum: 0x0
; SYMS64-NEXT: SymbolAlignmentLog2: 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
index 17047460f7ca8..8ee58755919b7 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
@@ -24,13 +24,13 @@ define dso_local void @test__trap_annotation(i32 %a) {
}
; EXCEPT: Exception section {
-; EXCEPT-NEXT: Symbol: .sub_test (3)
+; EXCEPT-NEXT: Symbol: .sub_test
; EXCEPT-NEXT: LangID: 0
; EXCEPT-NEXT: Reason: 0
; EXCEPT-NEXT: Trap Instr Addr: 0x4
; EXCEPT-NEXT: LangID: 1
; EXCEPT-NEXT: Reason: 2
-; EXCEPT-NEXT: Symbol: .test__trap_annotation (6)
+; EXCEPT-NEXT: Symbol: .test__trap_annotation
; EXCEPT-NEXT: LangID: 0
; EXCEPT-NEXT: Reason: 0
; EXCEPT-NEXT: Trap Instr Addr: 0x3C
@@ -75,7 +75,7 @@ define dso_local void @test__trap_annotation(i32 %a) {
; SYMS-NEXT: }
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#IND+2]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -102,7 +102,7 @@ define dso_local void @test__trap_annotation(i32 %a) {
; SYMS-NEXT: }
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#IND+5]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -114,13 +114,13 @@ define dso_local void @test__trap_annotation(i32 %a) {
; SYMS-NEXT: }
; EXCEPT64: Exception section {
-; EXCEPT64-NEXT: Symbol: .sub_test (3)
+; EXCEPT64-NEXT: Symbol: .sub_test
; EXCEPT64-NEXT: LangID: 0
; EXCEPT64-NEXT: Reason: 0
; EXCEPT64-NEXT: Trap Instr Addr: 0x4
; EXCEPT64-NEXT: LangID: 1
; EXCEPT64-NEXT: Reason: 2
-; EXCEPT64-NEXT: Symbol: .test__trap_annotation (6)
+; EXCEPT64-NEXT: Symbol: .test__trap_annotation
; EXCEPT64-NEXT: LangID: 0
; EXCEPT64-NEXT: Reason: 0
; EXCEPT64-NEXT: Trap Instr Addr: 0x3C
@@ -163,7 +163,7 @@ define dso_local void @test__trap_annotation(i32 %a) {
; SYMS64-NEXT: }
; SYMS64-NEXT: CSECT Auxiliary Entry {
; SYMS64-NEXT: Index: [[#IND+2]]
-; SYMS64-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS64-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS64-NEXT: ParameterHashIndex: 0x0
; SYMS64-NEXT: TypeChkSectNum: 0x0
; SYMS64-NEXT: SymbolAlignmentLog2: 0
@@ -189,7 +189,7 @@ define dso_local void @test__trap_annotation(i32 %a) {
; SYMS64-NEXT: }
; SYMS64-NEXT: CSECT Auxiliary Entry {
; SYMS64-NEXT: Index: [[#IND+5]]
-; SYMS64-NEXT: ContainingCsectSymbolIndex: 1
+; SYMS64-NEXT: ContainingCsectSymbolIndex: [[#IND-2]]
; SYMS64-NEXT: ParameterHashIndex: 0x0
; SYMS64-NEXT: TypeChkSectNum: 0x0
; SYMS64-NEXT: SymbolAlignmentLog2: 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
index a38da2229a7e8..a28c2f2eefea2 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
@@ -48,7 +48,7 @@ entry:
; CHECK-NEXT: L..C1:
; CHECK-NEXT: .tc ext_zvar[TC],ext_zvar
-; CHECKOBJ: 00000000 (idx: 5) .ext_fun:
+; CHECKOBJ: 00000000 (idx: [[#INDX:]]) .ext_fun:
; CHECKOBJ-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
; CHECKOBJ-NEXT: 4: 80 82 00 04 lwz 4, 4(2)
; CHECKOBJ-NEXT: 8: 80 63 00 00 lwz 3, 0(3)
@@ -57,26 +57,26 @@ entry:
; CHECKOBJ-NEXT: 14: 38 63 00 01 addi 3, 3, 1
; CHECKOBJ-NEXT: 18: 4e 80 00 20 blr
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000001c (idx: 9) ext_const:
+; CHECKOBJ-NEXT: 0000001c (idx: [[#INDX+4]]) ext_const:
; CHECKOBJ-NEXT: 1c: 00 00 00 01 <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .data:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000020 (idx: 13) ext_var:
+; CHECKOBJ-NEXT: 00000020 (idx: [[#INDX+8]]) ext_var:
; CHECKOBJ-NEXT: 20: 00 00 00 01 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000024 (idx: 17) ext_zvar:
+; CHECKOBJ-NEXT: 00000024 (idx: [[#INDX+12]]) ext_zvar:
; CHECKOBJ-NEXT: 24: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000028 (idx: 19) ext_fun[DS]:
+; CHECKOBJ-NEXT: 00000028 (idx: [[#INDX+14]]) ext_fun[DS]:
; CHECKOBJ-NEXT: 28: 00 00 00 00 <unknown>
; CHECKOBJ-NEXT: 2c: 00 00 00 34 <unknown>
; CHECKOBJ-NEXT: 30: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000034 (idx: 23) ext_var[TC]:
+; CHECKOBJ-NEXT: 00000034 (idx: [[#INDX+18]]) ext_var[TC]:
; CHECKOBJ-NEXT: 34: 00 00 00 20 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000038 (idx: 25) ext_zvar[TC]:
+; CHECKOBJ-NEXT: 00000038 (idx: [[#INDX+20]]) ext_zvar[TC]:
; CHECKOBJ-NEXT: 38: 00 00 00 24 <unknown>
; CHECKSYM: Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: .ext_fun_sec
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
index a557b6f4f1719..dbfbd0de08b99 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
@@ -9,17 +9,17 @@
; RUN: -mattr=-altivec -function-sections -xcoff-traceback-table=true \
; RUN: -filetype=obj -o %t32.o < %s
; RUN: llvm-objdump --syms --reloc --symbol-description %t32.o | \
-; RUN: FileCheck --check-prefix=XCOFF32 %s
+; RUN: FileCheck -D#NFA=2 --check-prefix=XCOFF32 %s
; RUN: llvm-objdump -dr --symbol-description %t32.o | \
-; RUN: FileCheck --check-prefix=DIS32 %s
+; RUN: FileCheck -D#NFA=2 --check-prefix=DIS32 %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -function-sections -xcoff-traceback-table=true \
; RUN: -filetype=obj -o %t64.o < %s
; RUN: llvm-objdump --syms --reloc --symbol-description %t64.o | \
-; RUN: FileCheck --check-prefix=XCOFF64 %s
+; RUN: FileCheck -D#NFA=2 --check-prefix=XCOFF64 %s
; RUN: llvm-objdump -dr --symbol-description %t64.o | \
-; RUN: FileCheck --check-prefix=DIS64 %s
+; RUN: FileCheck -D#NFA=2 --check-prefix=DIS64 %s
@alias_foo = alias void (...), ptr @foo
@@ -113,117 +113,117 @@ entry:
; ASM-NEXT: .globl .alias_foo
; XCOFF32: SYMBOL TABLE:
-; XCOFF32-NEXT: 00000000 df *DEBUG* 00000000 (idx: 0) <stdin>
-; XCOFF32-NEXT: 00000000 *UND* 00000000 (idx: 1) .extern_foo[PR]
-; XCOFF32-NEXT: 00000000 *UND* 00000000 (idx: 3) extern_foo[DS]
-; XCOFF32-NEXT: 00000000 l .text 00000000 (idx: 5) [PR]
-; XCOFF32-NEXT: 00000000 g .text 00000019 (idx: 7) .foo[PR]
-; XCOFF32-NEXT: 00000000 g F .text (csect: (idx: 7) .foo[PR]) 00000000 (idx: 9) .alias_foo
-; XCOFF32-NEXT: 00000020 g F .text 00000020 .hidden (idx: 11) .hidden_foo[PR]
-; XCOFF32-NEXT: 00000040 g F .text 00000059 (idx: 13) .bar[PR]
-; XCOFF32-NEXT: 000000c0 l F .text 0000002a (idx: 15) .static_overalign_foo[PR]
-; XCOFF32-NEXT: 000000ec g O .data 0000000c (idx: 17) foo[DS]
-; XCOFF32-NEXT: 000000ec g O .data (csect: (idx: 17) foo[DS]) 00000000 (idx: 19) alias_foo
-; XCOFF32-NEXT: 000000f8 g O .data 0000000c .hidden (idx: 21) hidden_foo[DS]
-; XCOFF32-NEXT: 00000104 g O .data 0000000c (idx: 23) bar[DS]
-; XCOFF32-NEXT: 00000110 l O .data 0000000c (idx: 25) static_overalign_foo[DS]
-; XCOFF32-NEXT: 0000011c l .data 00000000 (idx: 27) TOC[TC0]
+; XCOFF32-NEXT: 00000000 df *DEBUG* 00000000 (idx: 0) .file
+; XCOFF32-NEXT: 00000000 *UND* 00000000 (idx: [[#NFA+1]]) .extern_foo[PR]
+; XCOFF32-NEXT: 00000000 *UND* 00000000 (idx: [[#NFA+3]]) extern_foo[DS]
+; XCOFF32-NEXT: 00000000 l .text 00000000 (idx: [[#NFA+5]]) [PR]
+; XCOFF32-NEXT: 00000000 g .text 00000019 (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF32-NEXT: 00000000 g F .text (csect: (idx: [[#NFA+7]]) .foo[PR]) 00000000 (idx: [[#NFA+9]]) .alias_foo
+; XCOFF32-NEXT: 00000020 g F .text 00000020 .hidden (idx: [[#NFA+11]]) .hidden_foo[PR]
+; XCOFF32-NEXT: 00000040 g F .text 00000059 (idx: [[#NFA+13]]) .bar[PR]
+; XCOFF32-NEXT: 000000c0 l F .text 0000002a (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF32-NEXT: 000000ec g O .data 0000000c (idx: [[#NFA+17]]) foo[DS]
+; XCOFF32-NEXT: 000000ec g O .data (csect: (idx: [[#NFA+17]]) foo[DS]) 00000000 (idx: [[#NFA+19]]) alias_foo
+; XCOFF32-NEXT: 000000f8 g O .data 0000000c .hidden (idx: [[#NFA+21]]) hidden_foo[DS]
+; XCOFF32-NEXT: 00000104 g O .data 0000000c (idx: [[#NFA+23]]) bar[DS]
+; XCOFF32-NEXT: 00000110 l O .data 0000000c (idx: [[#NFA+25]]) static_overalign_foo[DS]
+; XCOFF32-NEXT: 0000011c l .data 00000000 (idx: [[#NFA+27]]) TOC[TC0]
; XCOFF32: RELOCATION RECORDS FOR [.text]:
; XCOFF32-NEXT: OFFSET TYPE VALUE
-; XCOFF32-NEXT: 0000004c R_RBR (idx: 7) .foo[PR]
-; XCOFF32-NEXT: 00000054 R_RBR (idx: 15) .static_overalign_foo[PR]
-; XCOFF32-NEXT: 0000005c R_RBR (idx: 9) .alias_foo
-; XCOFF32-NEXT: 00000064 R_RBR (idx: 1) .extern_foo[PR]
-; XCOFF32-NEXT: 0000006c R_RBR (idx: 11) .hidden_foo[PR]
+; XCOFF32-NEXT: 0000004c R_RBR (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF32-NEXT: 00000054 R_RBR (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF32-NEXT: 0000005c R_RBR (idx: [[#NFA+9]]) .alias_foo
+; XCOFF32-NEXT: 00000064 R_RBR (idx: [[#NFA+1]]) .extern_foo[PR]
+; XCOFF32-NEXT: 0000006c R_RBR (idx: [[#NFA+11]]) .hidden_foo[PR]
; XCOFF32: RELOCATION RECORDS FOR [.data]:
; XCOFF32-NEXT: OFFSET TYPE VALUE
-; XCOFF32-NEXT: 00000000 R_POS (idx: 7) .foo[PR]
-; XCOFF32-NEXT: 00000004 R_POS (idx: 27) TOC[TC0]
-; XCOFF32-NEXT: 0000000c R_POS (idx: 11) .hidden_foo[PR]
-; XCOFF32-NEXT: 00000010 R_POS (idx: 27) TOC[TC0]
-; XCOFF32-NEXT: 00000018 R_POS (idx: 13) .bar[PR]
-; XCOFF32-NEXT: 0000001c R_POS (idx: 27) TOC[TC0]
-; XCOFF32-NEXT: 00000024 R_POS (idx: 15) .static_overalign_foo[PR]
-; XCOFF32-NEXT: 00000028 R_POS (idx: 27) TOC[TC0]
+; XCOFF32-NEXT: 00000000 R_POS (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF32-NEXT: 00000004 R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF32-NEXT: 0000000c R_POS (idx: [[#NFA+11]]) .hidden_foo[PR]
+; XCOFF32-NEXT: 00000010 R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF32-NEXT: 00000018 R_POS (idx: [[#NFA+13]]) .bar[PR]
+; XCOFF32-NEXT: 0000001c R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF32-NEXT: 00000024 R_POS (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF32-NEXT: 00000028 R_POS (idx: [[#NFA+27]]) TOC[TC0]
; XCOFF64: SYMBOL TABLE:
-; XCOFF64-NEXT: 0000000000000000 df *DEBUG* 0000000000000000 (idx: 0) <stdin>
-; XCOFF64-NEXT: 0000000000000000 *UND* 0000000000000000 (idx: 1) .extern_foo[PR]
-; XCOFF64-NEXT: 0000000000000000 *UND* 0000000000000000 (idx: 3) extern_foo[DS]
-; XCOFF64-NEXT: 0000000000000000 l .text 0000000000000000 (idx: 5) [PR]
-; XCOFF64-NEXT: 0000000000000000 g .text 0000000000000019 (idx: 7) .foo[PR]
-; XCOFF64-NEXT: 0000000000000000 g F .text (csect: (idx: 7) .foo[PR]) 0000000000000000 (idx: 9) .alias_foo
-; XCOFF64-NEXT: 0000000000000020 g F .text 0000000000000020 .hidden (idx: 11) .hidden_foo[PR]
-; XCOFF64-NEXT: 0000000000000040 g F .text 0000000000000059 (idx: 13) .bar[PR]
-; XCOFF64-NEXT: 00000000000000c0 l F .text 000000000000002a (idx: 15) .static_overalign_foo[PR]
-; XCOFF64-NEXT: 00000000000000f0 g O .data 0000000000000018 (idx: 17) foo[DS]
-; XCOFF64-NEXT: 00000000000000f0 g O .data (csect: (idx: 17) foo[DS]) 0000000000000000 (idx: 19) alias_foo
-; XCOFF64-NEXT: 0000000000000108 g O .data 0000000000000018 .hidden (idx: 21) hidden_foo[DS]
-; XCOFF64-NEXT: 0000000000000120 g O .data 0000000000000018 (idx: 23) bar[DS]
-; XCOFF64-NEXT: 0000000000000138 l O .data 0000000000000018 (idx: 25) static_overalign_foo[DS]
-; XCOFF64-NEXT: 0000000000000150 l .data 0000000000000000 (idx: 27) TOC[TC0]
+; XCOFF64-NEXT: 0000000000000000 df *DEBUG* 0000000000000000 (idx: 0) .file
+; XCOFF64-NEXT: 0000000000000000 *UND* 0000000000000000 (idx: [[#NFA+1]]) .extern_foo[PR]
+; XCOFF64-NEXT: 0000000000000000 *UND* 0000000000000000 (idx: [[#NFA+3]]) extern_foo[DS]
+; XCOFF64-NEXT: 0000000000000000 l .text 0000000000000000 (idx: [[#NFA+5]]) [PR]
+; XCOFF64-NEXT: 0000000000000000 g .text 0000000000000019 (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF64-NEXT: 0000000000000000 g F .text (csect: (idx: [[#NFA+7]]) .foo[PR]) 0000000000000000 (idx: [[#NFA+9]]) .alias_foo
+; XCOFF64-NEXT: 0000000000000020 g F .text 0000000000000020 .hidden (idx: [[#NFA+11]]) .hidden_foo[PR]
+; XCOFF64-NEXT: 0000000000000040 g F .text 0000000000000059 (idx: [[#NFA+13]]) .bar[PR]
+; XCOFF64-NEXT: 00000000000000c0 l F .text 000000000000002a (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF64-NEXT: 00000000000000f0 g O .data 0000000000000018 (idx: [[#NFA+17]]) foo[DS]
+; XCOFF64-NEXT: 00000000000000f0 g O .data (csect: (idx: [[#NFA+17]]) foo[DS]) 0000000000000000 (idx: [[#NFA+19]]) alias_foo
+; XCOFF64-NEXT: 0000000000000108 g O .data 0000000000000018 .hidden (idx: [[#NFA+21]]) hidden_foo[DS]
+; XCOFF64-NEXT: 0000000000000120 g O .data 0000000000000018 (idx: [[#NFA+23]]) bar[DS]
+; XCOFF64-NEXT: 0000000000000138 l O .data 0000000000000018 (idx: [[#NFA+25]]) static_overalign_foo[DS]
+; XCOFF64-NEXT: 0000000000000150 l .data 0000000000000000 (idx: [[#NFA+27]]) TOC[TC0]
; XCOFF64: RELOCATION RECORDS FOR [.text]:
; XCOFF64-NEXT: OFFSET TYPE VALUE
-; XCOFF64-NEXT: 000000000000004c R_RBR (idx: 7) .foo[PR]
-; XCOFF64-NEXT: 0000000000000054 R_RBR (idx: 15) .static_overalign_foo[PR]
-; XCOFF64-NEXT: 000000000000005c R_RBR (idx: 9) .alias_foo
-; XCOFF64-NEXT: 0000000000000064 R_RBR (idx: 1) .extern_foo[PR]
-; XCOFF64-NEXT: 000000000000006c R_RBR (idx: 11) .hidden_foo[PR]
+; XCOFF64-NEXT: 000000000000004c R_RBR (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF64-NEXT: 0000000000000054 R_RBR (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF64-NEXT: 000000000000005c R_RBR (idx: [[#NFA+9]]) .alias_foo
+; XCOFF64-NEXT: 0000000000000064 R_RBR (idx: [[#NFA+1]]) .extern_foo[PR]
+; XCOFF64-NEXT: 000000000000006c R_RBR (idx: [[#NFA+11]]) .hidden_foo[PR]
; XCOFF64: RELOCATION RECORDS FOR [.data]:
; XCOFF64-NEXT: OFFSET TYPE VALUE
-; XCOFF64-NEXT: 0000000000000000 R_POS (idx: 7) .foo[PR]
-; XCOFF64-NEXT: 0000000000000008 R_POS (idx: 27) TOC[TC0]
-; XCOFF64-NEXT: 0000000000000018 R_POS (idx: 11) .hidden_foo[PR]
-; XCOFF64-NEXT: 0000000000000020 R_POS (idx: 27) TOC[TC0]
-; XCOFF64-NEXT: 0000000000000030 R_POS (idx: 13) .bar[PR]
-; XCOFF64-NEXT: 0000000000000038 R_POS (idx: 27) TOC[TC0]
-; XCOFF64-NEXT: 0000000000000048 R_POS (idx: 15) .static_overalign_foo[PR]
-; XCOFF64-NEXT: 0000000000000050 R_POS (idx: 27) TOC[TC0]
+; XCOFF64-NEXT: 0000000000000000 R_POS (idx: [[#NFA+7]]) .foo[PR]
+; XCOFF64-NEXT: 0000000000000008 R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF64-NEXT: 0000000000000018 R_POS (idx: [[#NFA+11]]) .hidden_foo[PR]
+; XCOFF64-NEXT: 0000000000000020 R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF64-NEXT: 0000000000000030 R_POS (idx: [[#NFA+13]]) .bar[PR]
+; XCOFF64-NEXT: 0000000000000038 R_POS (idx: [[#NFA+27]]) TOC[TC0]
+; XCOFF64-NEXT: 0000000000000048 R_POS (idx: [[#NFA+15]]) .static_overalign_foo[PR]
+; XCOFF64-NEXT: 0000000000000050 R_POS (idx: [[#NFA+27]]) TOC[TC0]
; DIS32: Disassembly of section .text:
-; DIS32: 00000000 (idx: 9) .alias_foo:
-; DIS32: 00000020 (idx: 11) .hidden_foo[PR]:
-; DIS32: 00000040 (idx: 13) .bar[PR]:
+; DIS32: 00000000 (idx: [[#NFA+9]]) .alias_foo:
+; DIS32: 00000020 (idx: [[#NFA+11]]) .hidden_foo[PR]:
+; DIS32: 00000040 (idx: [[#NFA+13]]) .bar[PR]:
; DIS32-NEXT: 40: 7c 08 02 a6 mflr 0
; DIS32-NEXT: 44: 94 21 ff c0 stwu 1, -64(1)
; DIS32-NEXT: 48: 90 01 00 48 stw 0, 72(1)
; DIS32-NEXT: 4c: 4b ff ff b5 bl 0x0 <.foo>
-; DIS32-NEXT: 0000004c: R_RBR (idx: 7) .foo[PR]
+; DIS32-NEXT: 0000004c: R_RBR (idx: [[#NFA+7]]) .foo[PR]
; DIS32-NEXT: 50: 60 00 00 00 nop
; DIS32-NEXT: 54: 48 00 00 6d bl 0xc0 <.static_overalign_foo>
-; DIS32-NEXT: 00000054: R_RBR (idx: 15) .static_overalign_foo[PR]
+; DIS32-NEXT: 00000054: R_RBR (idx: [[#NFA+15]]) .static_overalign_foo[PR]
; DIS32-NEXT: 58: 60 00 00 00 nop
; DIS32-NEXT: 5c: 4b ff ff a5 bl 0x0 <.alias_foo>
-; DIS32-NEXT: 0000005c: R_RBR (idx: 9) .alias_foo
+; DIS32-NEXT: 0000005c: R_RBR (idx: [[#NFA+9]]) .alias_foo
; DIS32-NEXT: 60: 60 00 00 00 nop
; DIS32-NEXT: 64: 4b ff ff 9d bl 0x0 <.extern_foo>
-; DIS32-NEXT: 00000064: R_RBR (idx: 1) .extern_foo[PR]
+; DIS32-NEXT: 00000064: R_RBR (idx: [[#NFA+1]]) .extern_foo[PR]
; DIS32-NEXT: 68: 60 00 00 00 nop
; DIS32-NEXT: 6c: 4b ff ff b5 bl 0x20 <.hidden_foo>
-; DIS32-NEXT: 0000006c: R_RBR (idx: 11) .hidden_foo[PR]
-; DIS32: 000000c0 (idx: 15) .static_overalign_foo[PR]:
+; DIS32-NEXT: 0000006c: R_RBR (idx: [[#NFA+11]]) .hidden_foo[PR]
+; DIS32: 000000c0 (idx: [[#NFA+15]]) .static_overalign_foo[PR]:
; DIS64: Disassembly of section .text:
-; DIS64: 0000000000000000 (idx: 9) .alias_foo:
-; DIS64: 0000000000000020 (idx: 11) .hidden_foo[PR]:
-; DIS64: 0000000000000040 (idx: 13) .bar[PR]:
+; DIS64: 0000000000000000 (idx: [[#NFA+9]]) .alias_foo:
+; DIS64: 0000000000000020 (idx: [[#NFA+11]]) .hidden_foo[PR]:
+; DIS64: 0000000000000040 (idx: [[#NFA+13]]) .bar[PR]:
; DIS64-NEXT: 40: 7c 08 02 a6 mflr 0
; DIS64-NEXT: 44: f8 21 ff 91 stdu 1, -112(1)
; DIS64-NEXT: 48: f8 01 00 80 std 0, 128(1)
; DIS64-NEXT: 4c: 4b ff ff b5 bl 0x0 <.foo>
-; DIS64-NEXT: 000000000000004c: R_RBR (idx: 7) .foo[PR]
+; DIS64-NEXT: 000000000000004c: R_RBR (idx: [[#NFA+7]]) .foo[PR]
; DIS64-NEXT: 50: 60 00 00 00 nop
; DIS64-NEXT: 54: 48 00 00 6d bl 0xc0 <.static_overalign_foo>
-; DIS64-NEXT: 0000000000000054: R_RBR (idx: 15) .static_overalign_foo[PR]
+; DIS64-NEXT: 0000000000000054: R_RBR (idx: [[#NFA+15]]) .static_overalign_foo[PR]
; DIS64-NEXT: 58: 60 00 00 00 nop
; DIS64-NEXT: 5c: 4b ff ff a5 bl 0x0 <.alias_foo>
-; DIS64-NEXT: 000000000000005c: R_RBR (idx: 9) .alias_foo
+; DIS64-NEXT: 000000000000005c: R_RBR (idx: [[#NFA+9]]) .alias_foo
; DIS64-NEXT: 60: 60 00 00 00 nop
; DIS64-NEXT: 64: 4b ff ff 9d bl 0x0 <.extern_foo>
-; DIS64-NEXT: 0000000000000064: R_RBR (idx: 1) .extern_foo[PR]
+; DIS64-NEXT: 0000000000000064: R_RBR (idx: [[#NFA+1]]) .extern_foo[PR]
; DIS64-NEXT: 68: 60 00 00 00 nop
; DIS64-NEXT: 6c: 4b ff ff b5 bl 0x20 <.hidden_foo>
-; DIS64-NEXT: 000000000000006c: R_RBR (idx: 11) .hidden_foo[PR]
-; DIS64: 00000000000000c0 (idx: 15) .static_overalign_foo[PR]:
+; DIS64-NEXT: 000000000000006c: R_RBR (idx: [[#NFA+11]]) .hidden_foo[PR]
+; DIS64: 00000000000000c0 (idx: [[#NFA+15]]) .static_overalign_foo[PR]:
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
index 31fdea9ad13dd..8240306686abc 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
@@ -29,7 +29,7 @@
; OBJ-NEXT: TimeStamp:
; OBJ32-NEXT: SymbolTableOffset: 0x64
; OBJ64-NEXT: SymbolTableOffset: 0xA8
-; OBJ-NEXT: SymbolTableEntries: 9
+; OBJ-NEXT: SymbolTableEntries: 11
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
index ca13edd08513f..91e0f5da6e1b8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
@@ -147,7 +147,7 @@ entry:
; DIS64: Disassembly of section .text:
; DIS64-EMPTY:
-; DIS64-NEXT: 0000000000000000 (idx: 3) .foo:
+; DIS64-NEXT: 0000000000000000 (idx: {{[0-9]+}}) .foo:
; DIS64-NEXT: 0: 3c 62 00 00 addis 3, 2, 0
; DIS64-NEXT: 0000000000000002: R_TOCU (idx: [[#INDX:]]) a[TE]
; DIS64-NEXT: 4: 3c 82 00 00 addis 4, 2, 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 5ac6a7af0db26..82ff008ad16d0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -1,16 +1,16 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --section-headers --file-header %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC,RELOC32 %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM32 %s
+; RUN: llvm-readobj --section-headers --file-header %t.o | FileCheck -D#NFA=2 --check-prefixes=OBJ,OBJ32 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefixes=RELOC,RELOC32 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefixes=SYM,SYM32 %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
; RUN: llvm-objdump -r %t.o | FileCheck --check-prefix=DIS_REL %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec \
; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --section-headers --file-header %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
-; RUN: llvm-readobj --relocs --expand-relocs %t64.o | FileCheck --check-prefixes=RELOC,RELOC64 %s
-; RUN: llvm-readobj --syms %t64.o | FileCheck --check-prefixes=SYM,SYM64 %s
+; RUN: llvm-readobj --section-headers --file-header %t64.o | FileCheck -D#NFA=2 --check-prefixes=OBJ,OBJ64 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t64.o | FileCheck -D#NFA=2 --check-prefixes=RELOC,RELOC64 %s
+; RUN: llvm-readobj --syms %t64.o | FileCheck -D#NFA=2 --check-prefixes=SYM,SYM64 %s
; RUN: llvm-objdump -D %t64.o | FileCheck --check-prefix=DIS64 %s
; RUN: llvm-objdump -r %t64.o | FileCheck --check-prefix=DIS_REL64 %s
@@ -38,7 +38,7 @@ declare i32 @bar(i32)
; OBJ-NEXT: TimeStamp: None (0x0)
; OBJ32-NEXT: SymbolTableOffset: 0x13C
; OBJ64-NEXT: SymbolTableOffset: 0x1B8
-; OBJ-NEXT: SymbolTableEntries: 27
+; OBJ-NEXT: SymbolTableEntries: [[#NFA+27]]
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -80,7 +80,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Section (index: 1) .text {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x10
-; RELOC-NEXT: Symbol: .bar (1)
+; RELOC-NEXT: Symbol: .bar ([[#NFA+1]])
; RELOC-NEXT: IsSigned: Yes
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -88,7 +88,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1A
-; RELOC-NEXT: Symbol: globalA (23)
+; RELOC-NEXT: Symbol: globalA ([[#NFA+23]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -96,7 +96,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1E
-; RELOC-NEXT: Symbol: globalB (25)
+; RELOC-NEXT: Symbol: globalB ([[#NFA+25]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -106,7 +106,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Section (index: 2) .data {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x70
-; RELOC-NEXT: Symbol: arr (15)
+; RELOC-NEXT: Symbol: arr ([[#NFA+15]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC32-NEXT: Length: 32
@@ -116,7 +116,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Relocation {
; RELOC32-NEXT: Virtual Address: 0x74
; RELOC64-NEXT: Virtual Address: 0x78
-; RELOC-NEXT: Symbol: .foo (7)
+; RELOC-NEXT: Symbol: .foo ([[#NFA+7]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC32-NEXT: Length: 32
@@ -126,7 +126,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Relocation {
; RELOC32-NEXT: Virtual Address: 0x78
; RELOC64-NEXT: Virtual Address: 0x80
-; RELOC-NEXT: Symbol: TOC (21)
+; RELOC-NEXT: Symbol: TOC ([[#NFA+21]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC32-NEXT: Length: 32
@@ -136,7 +136,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Relocation {
; RELOC32-NEXT: Virtual Address: 0x80
; RELOC64-NEXT: Virtual Address: 0x90
-; RELOC-NEXT: Symbol: globalA (11)
+; RELOC-NEXT: Symbol: globalA ([[#NFA+11]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC32-NEXT: Length: 32
@@ -146,7 +146,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Relocation {
; RELOC32-NEXT: Virtual Address: 0x84
; RELOC64-NEXT: Virtual Address: 0x98
-; RELOC-NEXT: Symbol: globalB (13)
+; RELOC-NEXT: Symbol: globalB ([[#NFA+13]])
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC32-NEXT: Length: 32
@@ -159,14 +159,26 @@ declare i32 @bar(i32)
; SYM: Symbols [
; SYM-NEXT: Symbol {
; SYM-NEXT: Index: 0
-; SYM-NEXT: Name: <stdin>
+; SYM-NEXT: Name: .file
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
; SYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
; SYM-NEXT: StorageClass: C_FILE (0x67)
-; SYM-NEXT: NumberOfAuxEntries: 0
+; SYM-NEXT: NumberOfAuxEntries: 2
+; SYM-NEXT: File Auxiliary Entry {
+; SYM-NEXT: Index: 1
+; SYM-NEXT: Name: <stdin>
+; SYM-NEXT: Type: XFT_FN (0x0)
+; SYM64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; SYM-NEXT: }
+; SYM-NEXT: File Auxiliary Entry {
+; SYM-NEXT: Index: 2
+; SYM-NEXT: Name: LLVM version 18.0.0git
+; SYM-NEXT: Type: XFT_CV (0x2)
+; SYM64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
; SYM-NEXT: Index: [[#INDX:]]
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
index cafb91aafe232..0fa47373964a0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -82,7 +82,7 @@
; OBJ-NEXT: TimeStamp: None (0x0)
; OBJ32-NEXT: SymbolTableOffset: 0x8C
; OBJ64-NEXT: SymbolTableOffset: 0xB0
-; OBJ-NEXT: SymbolTableEntries: 21
+; OBJ-NEXT: SymbolTableEntries: 23
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
index 494078010fd05..296bef6919de5 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
@@ -10,7 +10,7 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D -r --symbol-description %t.o | \
-; RUN: FileCheck --check-prefix=OBJ %s
+; RUN: FileCheck --check-prefix=OBJ -D#NFA=2 %s
; This is f`o
@"f\60o" = global i32 10, align 4
@@ -105,12 +105,12 @@ declare i32 @"f\40o"(...)
; OBJ: Disassembly of section .text:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000000 (idx: 7) .f$o:
+; OBJ-NEXT: 00000000 (idx: [[#NFA+7]]) .f$o:
; OBJ-NEXT: 0: 7c 08 02 a6 mflr 0
; OBJ-NEXT: 4: 94 21 ff c0 stwu 1, -64(1)
; OBJ-NEXT: 8: 90 01 00 48 stw 0, 72(1)
; OBJ-NEXT: c: 4b ff ff f5 bl 0x0
-; OBJ-NEXT: 0000000c: R_RBR (idx: 1) .f at o[PR]
+; OBJ-NEXT: 0000000c: R_RBR (idx: [[#NFA+1]]) .f at o[PR]
; OBJ-NEXT: 10: 60 00 00 00 nop
; OBJ-NEXT: 14: 38 21 00 40 addi 1, 1, 64
; OBJ-NEXT: 18: 80 01 00 08 lwz 0, 8(1)
@@ -120,13 +120,13 @@ declare i32 @"f\40o"(...)
; OBJ-NEXT: 28: 60 00 00 00 nop
; OBJ-NEXT: 2c: 60 00 00 00 nop
; OBJ-EMPTY:
-; OBJ-NEXT: 00000030 (idx: 9) .f&o:
+; OBJ-NEXT: 00000030 (idx: [[#NFA+9]]) .f&o:
; OBJ-NEXT: 30: 7c 08 02 a6 mflr 0
; OBJ-NEXT: 34: 94 21 ff c0 stwu 1, -64(1)
; OBJ-NEXT: 38: 90 01 00 48 stw 0, 72(1)
; OBJ-NEXT: 3c: 4b ff ff c5 bl 0x0
; OBJ-NEXT: 40: 80 82 00 00 lwz 4, 0(2)
-; OBJ-NEXT: 00000042: R_TOC (idx: 25) f=o[TC]
+; OBJ-NEXT: 00000042: R_TOC (idx: [[#NFA+25]]) f=o[TC]
; OBJ-NEXT: 44: 80 84 00 00 lwz 4, 0(4)
; OBJ-NEXT: 48: 7c 63 22 14 add 3, 3, 4
; OBJ-NEXT: 4c: 38 21 00 40 addi 1, 1, 64
@@ -135,49 +135,49 @@ declare i32 @"f\40o"(...)
; OBJ-NEXT: 58: 4e 80 00 20 blr
; OBJ-NEXT: 5c: 60 00 00 00 nop
; OBJ-EMPTY:
-; OBJ-NEXT: 00000060 (idx: 11) .f&_o:
+; OBJ-NEXT: 00000060 (idx: [[#NFA+11]]) .f&_o:
; OBJ-NEXT: 60: 80 62 00 04 lwz 3, 4(2)
-; OBJ-NEXT: 00000062: R_TOC (idx: 27) f at o[TC]
+; OBJ-NEXT: 00000062: R_TOC (idx: [[#NFA+27]]) f at o[TC]
; OBJ-NEXT: 64: 4e 80 00 20 blr
; OBJ-EMPTY:
; OBJ-NEXT: Disassembly of section .data:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000068 (idx: 15) f`o:
+; OBJ-NEXT: 00000068 (idx: [[#NFA+15]]) f`o:
; OBJ-NEXT: 68: 00 00 00 0a <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 0000006c (idx: 17) f$o[DS]:
+; OBJ-NEXT: 0000006c (idx: [[#NFA+17]]) f$o[DS]:
; OBJ-NEXT: 6c: 00 00 00 00 <unknown>
-; OBJ-NEXT: 0000006c: R_POS (idx: 7) .f$o
+; OBJ-NEXT: 0000006c: R_POS (idx: [[#NFA+7]]) .f$o
; OBJ-NEXT: 70: 00 00 00 90 <unknown>
-; OBJ-NEXT: 00000070: R_POS (idx: 23) TOC[TC0]
+; OBJ-NEXT: 00000070: R_POS (idx: [[#NFA+23]]) TOC[TC0]
; OBJ-NEXT: 74: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000078 (idx: 19) f&o[DS]:
+; OBJ-NEXT: 00000078 (idx: [[#NFA+19]]) f&o[DS]:
; OBJ-NEXT: 78: 00 00 00 30 <unknown>
-; OBJ-NEXT: 00000078: R_POS (idx: 9) .f&o
+; OBJ-NEXT: 00000078: R_POS (idx: [[#NFA+9]]) .f&o
; OBJ-NEXT: 7c: 00 00 00 90 <unknown>
-; OBJ-NEXT: 0000007c: R_POS (idx: 23) TOC[TC0]
+; OBJ-NEXT: 0000007c: R_POS (idx: [[#NFA+23]]) TOC[TC0]
; OBJ-NEXT: 80: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000084 (idx: 21) f&_o[DS]:
+; OBJ-NEXT: 00000084 (idx: [[#NFA+21]]) f&_o[DS]:
; OBJ-NEXT: 84: 00 00 00 60 <unknown>
-; OBJ-NEXT: 00000084: R_POS (idx: 11) .f&_o
+; OBJ-NEXT: 00000084: R_POS (idx: [[#NFA+11]]) .f&_o
; OBJ-NEXT: 88: 00 00 00 90 <unknown>
-; OBJ-NEXT: 00000088: R_POS (idx: 23) TOC[TC0]
+; OBJ-NEXT: 00000088: R_POS (idx: [[#NFA+23]]) TOC[TC0]
; OBJ-NEXT: 8c: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000090 (idx: 25) f=o[TC]:
+; OBJ-NEXT: 00000090 (idx: [[#NFA+25]]) f=o[TC]:
; OBJ-NEXT: 90: 00 00 00 9c <unknown>
-; OBJ-NEXT: 00000090: R_POS (idx: 31) f=o[BS]
+; OBJ-NEXT: 00000090: R_POS (idx: [[#NFA+31]]) f=o[BS]
; OBJ-EMPTY:
-; OBJ-NEXT: 00000094 (idx: 27) f at o[TC]:
+; OBJ-NEXT: 00000094 (idx: [[#NFA+27]]) f at o[TC]:
; OBJ-NEXT: 94: 00 00 00 00 <unknown>
-; OBJ-NEXT: 00000094: R_POS (idx: 3) f at o[DS]
+; OBJ-NEXT: 00000094: R_POS (idx: [[#NFA+3]]) f at o[DS]
; OBJ-EMPTY:
; OBJ-NEXT: Disassembly of section .bss:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000098 (idx: 29) f"o"[RW]:
+; OBJ-NEXT: 00000098 (idx: [[#NFA+29]]) f"o"[RW]:
; OBJ-NEXT: ...
; OBJ-EMPTY:
-; OBJ-NEXT: 0000009c (idx: 31) f=o[BS]:
+; OBJ-NEXT: 0000009c (idx: [[#NFA+31]]) f=o[BS]:
; OBJ-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll b/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
index 2d2c09cc17abc..5fbd3b17d4f8a 100644
--- a/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
+++ b/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
@@ -2,9 +2,9 @@
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
-; RUN: llvm-readobj %t32.o --syms | FileCheck %s --check-prefix=OBJ32
+; RUN: llvm-readobj %t32.o --syms | FileCheck %s -D#INDX=5 --check-prefix=OBJ32
; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
-; RUN: llvm-readobj %t64.o --syms | FileCheck %s --check-prefix=OBJ64
+; RUN: llvm-readobj %t64.o --syms | FileCheck %s -D#INDX=5 --check-prefix=OBJ64
@i = global i32 55, align 4 #0
@@ -16,8 +16,7 @@ attributes #0 = { "toc-data" }
; CHECK-NEXT: .align 2
; CHECK-NEXT: .vbyte 4, 55
-; OBJ32: Symbol {
-; OBJ32: Index: 3
+; OBJ32: Index: [[#INDX]]
; OBJ32-NEXT: Name: TOC
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: .data
@@ -25,7 +24,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 4
+; OBJ32-NEXT: Index: [[#INDX+1]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -37,7 +36,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: }
; OBJ32-NEXT: }
; OBJ32-NEXT: Symbol {
-; OBJ32-NEXT: Index: 5
+; OBJ32-NEXT: Index: [[#INDX+2]]
; OBJ32-NEXT: Name: i
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: .data
@@ -45,7 +44,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 6
+; OBJ32-NEXT: Index: [[#INDX+3]]
; OBJ32-NEXT: SectionLen: 4
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -57,8 +56,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: }
; OBJ32-NEXT: }
-; OBJ64: Symbol {
-; OBJ64: Index: 3
+; OBJ64: Index: [[#INDX]]
; OBJ64-NEXT: Name: TOC
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: .data
@@ -66,7 +64,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 4
+; OBJ64-NEXT: Index: [[#INDX+1]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
@@ -77,7 +75,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: }
; OBJ64-NEXT: }
; OBJ64-NEXT: Symbol {
-; OBJ64-NEXT: Index: 5
+; OBJ64-NEXT: Index: [[#INDX+2]]
; OBJ64-NEXT: Name: i
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: .data
@@ -85,7 +83,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 6
+; OBJ64-NEXT: Index: [[#INDX+3]]
; OBJ64-NEXT: SectionLen: 4
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll b/llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
index 04a2bfbf2dd44..0a649f683feaa 100644
--- a/llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
@@ -2,9 +2,9 @@
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
-; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s --check-prefix=OBJ32
+; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ32
; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
-; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s --check-prefix=OBJ64
+; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ64
@i = external global i32, align 4 #0
@@ -22,16 +22,16 @@ attributes #0 = { "toc-data" }
; OBJ32: Relocations [
; OBJ32-NEXT: Section (index: 1) .text {
-; OBJ32-NEXT: 0x2 R_TOC i(1) 0xF
+; OBJ32-NEXT: 0x2 R_TOC i([[#NFA+1]]) 0xF
; OBJ32-NEXT: }
; OBJ32-NEXT: Section (index: 2) .data {
-; OBJ32-NEXT: 0x20 R_POS .get(5) 0x1F
-; OBJ32-NEXT: 0x24 R_POS TOC(9) 0x1F
+; OBJ32-NEXT: 0x20 R_POS .get([[#NFA+5]]) 0x1F
+; OBJ32-NEXT: 0x24 R_POS TOC([[#NFA+9]]) 0x1F
; OBJ32-NEXT: }
; OBJ32-NEXT: ]
; OBJ32: Symbol {
-; OBJ32: Index: 1
+; OBJ32: Index: [[#NFA+1]]
; OBJ32-NEXT: Name: i
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: N_UNDEF
@@ -39,7 +39,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 2
+; OBJ32-NEXT: Index: [[#NFA+2]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -51,7 +51,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: }
; OBJ32-NEXT: }
; OBJ32: Symbol {
-; OBJ32: Index: 9
+; OBJ32: Index: [[#NFA+9]]
; OBJ32-NEXT: Name: TOC
; OBJ32-NEXT: Value (RelocatableAddress): 0x2C
; OBJ32-NEXT: Section: .data
@@ -59,7 +59,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 10
+; OBJ32-NEXT: Index: [[#NFA+10]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -73,16 +73,16 @@ attributes #0 = { "toc-data" }
; OBJ64: Relocations [
; OBJ64-NEXT: Section (index: 1) .text {
-; OBJ64-NEXT: 0x2 R_TOC i(1) 0xF
+; OBJ64-NEXT: 0x2 R_TOC i([[#NFA+1]]) 0xF
; OBJ64-NEXT: }
; OBJ64-NEXT: Section (index: 2) .data {
-; OBJ64-NEXT: 0x20 R_POS .get(5) 0x3F
-; OBJ64-NEXT: 0x28 R_POS TOC(9) 0x3F
+; OBJ64-NEXT: 0x20 R_POS .get([[#NFA+5]]) 0x3F
+; OBJ64-NEXT: 0x28 R_POS TOC([[#NFA+9]]) 0x3F
; OBJ64-NEXT: }
; OBJ64-NEXT: ]
; OBJ64: Symbol {
-; OBJ64: Index: 1
+; OBJ64: Index: [[#NFA+1]]
; OBJ64-NEXT: Name: i
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: N_UNDEF
@@ -90,7 +90,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 2
+; OBJ64-NEXT: Index: [[#NFA+2]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
@@ -101,7 +101,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: }
; OBJ64-NEXT: }
; OBJ64: Symbol {
-; OBJ64: Index: 9
+; OBJ64: Index: [[#NFA+9]]
; OBJ64-NEXT: Name: TOC
; OBJ64-NEXT: Value (RelocatableAddress): 0x38
; OBJ64-NEXT: Section: .data
@@ -109,7 +109,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 10
+; OBJ64-NEXT: Index: [[#NFA+10]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
index 17c2b438a94aa..1e48b1242f852 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
@@ -9,7 +9,7 @@
; Check that we do not crash in object mode
; OBJ64: Exception section {
-; OBJ64-NEXT: Symbol: .test__tdw_annotation (6)
+; OBJ64-NEXT: Symbol: .test__tdw_annotation
!1 = !{!"ppc-trap-reason", !"1", !"2"}
declare void @llvm.ppc.trapd(i64 %a)
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
index 24a0723bf39cf..d18d075590d25 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
@@ -13,7 +13,7 @@
; Check that we do not crash in object mode
; OBJ: Exception section {
-; OBJ-NEXT: Symbol: .test__trap_annotation (3)
+; OBJ-NEXT: Symbol: .test__trap_annotation
!1 = !{!"ppc-trap-reason", !"1", !"2"}
declare void @llvm.ppc.trap(i32 %a)
diff --git a/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll b/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
index 480b44caaded7..02b0a9ba4397c 100644
--- a/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
+++ b/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
@@ -121,7 +121,7 @@ entry:
; WITHVNDS-NEXT: .ref __llvm_prf_vnds[RW]
; WITHVNDS-OBJ: SYMBOL TABLE:
-; WITHVNDS-OBJ-NEXT: 00000000 df *DEBUG* 00000000 <stdin>
+; WITHVNDS-OBJ-NEXT: 00000000 df *DEBUG* 00000000 .file
; WITHVNDS-OBJ-NEXT: 00000000 l .text 00000008
; WITHVNDS-OBJ-NEXT: 00000000 g F .text (csect: ) 00000000 .main
; WITHVNDS-OBJ-NEXT: 00000008 l .text 00000006 __llvm_prf_names
diff --git a/llvm/test/CodeGen/PowerPC/toc-data-const.ll b/llvm/test/CodeGen/PowerPC/toc-data-const.ll
index 740032e26a432..6972079d826e0 100644
--- a/llvm/test/CodeGen/PowerPC/toc-data-const.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-data-const.ll
@@ -2,11 +2,11 @@
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
-; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s --check-prefix=OBJ32
+; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ32
; RUN: llvm-objdump %t32.o -dr | FileCheck %s --check-prefix=DIS32
; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
-; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s --check-prefix=OBJ64
+; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ64
; RUN: llvm-objdump %t64.o -dr | FileCheck %s --check-prefix=DIS64
@i1 = external constant i32 #0
@@ -35,20 +35,20 @@ attributes #0 = { "toc-data" }
; OBJ32: Relocations [
; OBJ32-NEXT: Section (index: 1) .text {
-; OBJ32-NEXT: 0x2 R_TOC i1(1) 0xF
-; OBJ32-NEXT: 0x26 R_TOC i2(15) 0xF
+; OBJ32-NEXT: 0x2 R_TOC i1([[#NFA+1]]) 0xF
+; OBJ32-NEXT: 0x26 R_TOC i2([[#NFA+15]]) 0xF
; OBJ32-NEXT: }
; OBJ32-NEXT: Section (index: 2) .data {
-; OBJ32-NEXT: 0x44 R_POS .read(5) 0x1F
-; OBJ32-NEXT: 0x48 R_POS TOC(13) 0x1F
-; OBJ32-NEXT: 0x50 R_POS .retptr(7) 0x1F
-; OBJ32-NEXT: 0x54 R_POS TOC(13) 0x1F
-; OBJ32-NEXT: 0x5C R_POS i1(1) 0x1F
+; OBJ32-NEXT: 0x44 R_POS .read([[#NFA+5]]) 0x1F
+; OBJ32-NEXT: 0x48 R_POS TOC([[#NFA+13]]) 0x1F
+; OBJ32-NEXT: 0x50 R_POS .retptr([[#NFA+7]]) 0x1F
+; OBJ32-NEXT: 0x54 R_POS TOC([[#NFA+13]]) 0x1F
+; OBJ32-NEXT: 0x5C R_POS i1([[#NFA+1]]) 0x1F
; OBJ32-NEXT: }
; OBJ32-NEXT: ]
; OBJ32: Symbol {
-; OBJ32: Index: 1
+; OBJ32: Index: [[#NFA+1]]
; OBJ32-NEXT: Name: i1
; OBJ32-NEXT: Value (RelocatableAddress): 0x0
; OBJ32-NEXT: Section: N_UNDEF
@@ -56,7 +56,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 2
+; OBJ32-NEXT: Index: [[#NFA+2]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -68,7 +68,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: }
; OBJ32-NEXT: }
; OBJ32: Symbol {
-; OBJ32: Index: 13
+; OBJ32: Index: [[#NFA+13]]
; OBJ32-NEXT: Name: TOC
; OBJ32-NEXT: Value (RelocatableAddress): 0x5C
; OBJ32-NEXT: Section: .data
@@ -76,7 +76,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 14
+; OBJ32-NEXT: Index: [[#NFA+14]]
; OBJ32-NEXT: SectionLen: 0
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -88,7 +88,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: }
; OBJ32-NEXT: }
; OBJ32: Symbol {
-; OBJ32: Index: 15
+; OBJ32: Index: [[#NFA+15]]
; OBJ32-NEXT: Name: i2
; OBJ32-NEXT: Value (RelocatableAddress): 0x5C
; OBJ32-NEXT: Section: .data
@@ -96,7 +96,7 @@ attributes #0 = { "toc-data" }
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
; OBJ32-NEXT: NumberOfAuxEntries: 1
; OBJ32-NEXT: CSECT Auxiliary Entry {
-; OBJ32-NEXT: Index: 16
+; OBJ32-NEXT: Index: [[#NFA+16]]
; OBJ32-NEXT: SectionLen: 4
; OBJ32-NEXT: ParameterHashIndex: 0x0
; OBJ32-NEXT: TypeChkSectNum: 0x0
@@ -110,20 +110,20 @@ attributes #0 = { "toc-data" }
; OBJ64: Relocations [
; OBJ64-NEXT: Section (index: 1) .text {
-; OBJ64-NEXT: 0x2 R_TOC i1(1) 0xF
-; OBJ64-NEXT: 0x26 R_TOC i2(15) 0xF
+; OBJ64-NEXT: 0x2 R_TOC i1([[#NFA+1]]) 0xF
+; OBJ64-NEXT: 0x26 R_TOC i2([[#NFA+15]]) 0xF
; OBJ64-NEXT: }
; OBJ64-NEXT: Section (index: 2) .data {
-; OBJ64-NEXT: 0x48 R_POS .read(5) 0x3F
-; OBJ64-NEXT: 0x50 R_POS TOC(13) 0x3F
-; OBJ64-NEXT: 0x60 R_POS .retptr(7) 0x3F
-; OBJ64-NEXT: 0x68 R_POS TOC(13) 0x3F
-; OBJ64-NEXT: 0x78 R_POS i1(1) 0x3F
+; OBJ64-NEXT: 0x48 R_POS .read([[#NFA+5]]) 0x3F
+; OBJ64-NEXT: 0x50 R_POS TOC([[#NFA+13]]) 0x3F
+; OBJ64-NEXT: 0x60 R_POS .retptr([[#NFA+7]]) 0x3F
+; OBJ64-NEXT: 0x68 R_POS TOC([[#NFA+13]]) 0x3F
+; OBJ64-NEXT: 0x78 R_POS i1([[#NFA+1]]) 0x3F
; OBJ64-NEXT: }
; OBJ64-NEXT: ]
; OBJ64: Symbol {
-; OBJ64: Index: 1
+; OBJ64: Index: [[#NFA+1]]
; OBJ64-NEXT: Name: i1
; OBJ64-NEXT: Value (RelocatableAddress): 0x0
; OBJ64-NEXT: Section: N_UNDEF
@@ -131,7 +131,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 2
+; OBJ64-NEXT: Index: [[#NFA+2]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
@@ -142,7 +142,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: }
; OBJ64-NEXT: }
; OBJ64: Symbol {
-; OBJ64: Index: 13
+; OBJ64: Index: [[#NFA+13]]
; OBJ64-NEXT: Name: TOC
; OBJ64-NEXT: Value (RelocatableAddress): 0x78
; OBJ64-NEXT: Section: .data
@@ -150,7 +150,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_HIDEXT (0x6B)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 14
+; OBJ64-NEXT: Index: [[#NFA+14]]
; OBJ64-NEXT: SectionLen: 0
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
@@ -161,7 +161,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: }
; OBJ64-NEXT: }
; OBJ64: Symbol {
-; OBJ64: Index: 15
+; OBJ64: Index: [[#NFA+15]]
; OBJ64-NEXT: Name: i2
; OBJ64-NEXT: Value (RelocatableAddress): 0x78
; OBJ64-NEXT: Section: .data
@@ -169,7 +169,7 @@ attributes #0 = { "toc-data" }
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
; OBJ64-NEXT: NumberOfAuxEntries: 1
; OBJ64-NEXT: CSECT Auxiliary Entry {
-; OBJ64-NEXT: Index: 16
+; OBJ64-NEXT: Index: [[#NFA+16]]
; OBJ64-NEXT: SectionLen: 8
; OBJ64-NEXT: ParameterHashIndex: 0x0
; OBJ64-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/MC/PowerPC/aix-file-symbols.s b/llvm/test/MC/PowerPC/aix-file-symbols.s
index 7ab0244f3c714..42aecb74a8512 100644
--- a/llvm/test/MC/PowerPC/aix-file-symbols.s
+++ b/llvm/test/MC/PowerPC/aix-file-symbols.s
@@ -1,6 +1,6 @@
## Check mutiple C_FILE symbols are emitted.
# RUN: llvm-mc -triple powerpc-ibm-aix-xcoff %s -filetype=obj -o - | \
-# RUN: llvm-objdump --syms - | FileCheck %s
+# RUN: llvm-readobj --syms - | FileCheck %s
.file "1.c"
.globl .var1
@@ -10,10 +10,10 @@
.var2:
.file "3.c"
-# CHECK: SYMBOL TABLE:
-# CHECK-NEXT: 00000000 df *DEBUG* 00000000 1.c
-# CHECK-NEXT: 00000000 df *DEBUG* 00000000 2.c
-# CHECK-NEXT: 00000000 df *DEBUG* 00000000 3.c
-# CHECK-NEXT: 00000000 l .text 00000000
-# CHECK-NEXT: 00000000 g F .text (csect: ) 00000000 .var1
-# CHECK-NEXT: 00000000 g F .text (csect: ) 00000000 .var2
+# CHECK: Symbols [
+# CHECK: Name: 1.c
+# CHECK-NEXT: Type: XFT_FN (0x0)
+# CHECK: Name: 2.c
+# CHECK-NEXT: Type: XFT_FN (0x0)
+# CHECK: Name: 3.c
+# CHECK-NEXT: Type: XFT_FN (0x0)
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test b/llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
index f8fc114f05a62..94b04c5e89c64 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
+++ b/llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
@@ -1,8 +1,8 @@
; Test the --syms option for xcoff object files.
; Also test the --symbol-description option for xcoff object files, when specified with --syms.
; RUN: llc -mtriple powerpc-ibm-aix -mcpu=pwr4 -filetype=obj -o %t.o < %s
-; RUN: llvm-objdump --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump --syms --symbol-description %t.o | FileCheck --check-prefix=SYM-DES %s
+; RUN: llvm-objdump --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
+; RUN: llvm-objdump --syms --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=SYM-DES %s
;; The IR below is generated by the following source code.
;; bash> cat test.c
@@ -66,7 +66,7 @@ entry:
}
; SYM: SYMBOL TABLE:
-; SYM-NEXT: 00000000 df *DEBUG* 00000000 <stdin>
+; SYM-NEXT: 00000000 df *DEBUG* 00000000 .file
; SYM-NEXT: 00000000 *UND* 00000000 ei
; SYM-NEXT: 00000000 l .text 00000091
; SYM-NEXT: 00000000 g F .text (csect: ) 00000000 .bar
@@ -88,23 +88,23 @@ entry:
; SYM-NEXT: 000000ec l O *COM* 00000004 si
; SYM-DES: SYMBOL TABLE:
-; SYM-DES-NEXT: 00000000 df *DEBUG* 00000000 (idx: 0) <stdin>
-; SYM-DES-NEXT: 00000000 *UND* 00000000 (idx: 1) ei[UA]
-; SYM-DES-NEXT: 00000000 l .text 00000091 (idx: 3) [PR]
-; SYM-DES-NEXT: 00000000 g F .text (csect: (idx: 3) [PR]) 00000000 (idx: 5) .bar
-; SYM-DES-NEXT: 00000050 g F .text (csect: (idx: 3) [PR]) 00000000 (idx: 7) .foo
-; SYM-DES-NEXT: 00000094 l .text 00000013 (idx: 9) L...str[RO]
-; SYM-DES-NEXT: 000000a8 g O .data 00000004 (idx: 11) con[RW]
-; SYM-DES-NEXT: 000000ac w O .data 00000004 (idx: 13) wi[RW]
-; SYM-DES-NEXT: 000000b0 g O .data 00000004 (idx: 15) i[RW]
-; SYM-DES-NEXT: 000000b4 g O .data 00000001 (idx: 17) c[RW]
-; SYM-DES-NEXT: 000000b8 g O .data 00000004 (idx: 19) ap[RW]
-; SYM-DES-NEXT: 000000bc g O .data 00000004 (idx: 21) f[RW]
-; SYM-DES-NEXT: 000000c0 g O .data 00000008 (idx: 23) ll[RW]
-; SYM-DES-NEXT: 000000c8 g O .data 0000000c (idx: 25) bar[DS]
-; SYM-DES-NEXT: 000000d4 g O .data 0000000c (idx: 27) foo[DS]
-; SYM-DES-NEXT: 000000e0 l .data 00000000 (idx: 29) TOC[TC0]
-; SYM-DES-NEXT: 000000e0 l O .data 00000004 (idx: 31) si[TC]
-; SYM-DES-NEXT: 000000e4 l O .data 00000004 (idx: 33) ei[TC]
-; SYM-DES-NEXT: 000000e8 l O .data 00000004 (idx: 35) con[TC]
-; SYM-DES-NEXT: 000000ec l O *COM* 00000004 (idx: 37) si[BS]
+; SYM-DES-NEXT: 00000000 df *DEBUG* 00000000 (idx: 0) .file
+; SYM-DES-NEXT: 00000000 *UND* 00000000 (idx: [[#NFA+1]]) ei[UA]
+; SYM-DES-NEXT: 00000000 l .text 00000091 (idx: [[#NFA+3]]) [PR]
+; SYM-DES-NEXT: 00000000 g F .text (csect: (idx: [[#NFA+3]]) [PR]) 00000000 (idx: [[#NFA+5]]) .bar
+; SYM-DES-NEXT: 00000050 g F .text (csect: (idx: [[#NFA+3]]) [PR]) 00000000 (idx: [[#NFA+7]]) .foo
+; SYM-DES-NEXT: 00000094 l .text 00000013 (idx: [[#NFA+9]]) L...str[RO]
+; SYM-DES-NEXT: 000000a8 g O .data 00000004 (idx: [[#NFA+11]]) con[RW]
+; SYM-DES-NEXT: 000000ac w O .data 00000004 (idx: [[#NFA+13]]) wi[RW]
+; SYM-DES-NEXT: 000000b0 g O .data 00000004 (idx: [[#NFA+15]]) i[RW]
+; SYM-DES-NEXT: 000000b4 g O .data 00000001 (idx: [[#NFA+17]]) c[RW]
+; SYM-DES-NEXT: 000000b8 g O .data 00000004 (idx: [[#NFA+19]]) ap[RW]
+; SYM-DES-NEXT: 000000bc g O .data 00000004 (idx: [[#NFA+21]]) f[RW]
+; SYM-DES-NEXT: 000000c0 g O .data 00000008 (idx: [[#NFA+23]]) ll[RW]
+; SYM-DES-NEXT: 000000c8 g O .data 0000000c (idx: [[#NFA+25]]) bar[DS]
+; SYM-DES-NEXT: 000000d4 g O .data 0000000c (idx: [[#NFA+27]]) foo[DS]
+; SYM-DES-NEXT: 000000e0 l .data 00000000 (idx: [[#NFA+29]]) TOC[TC0]
+; SYM-DES-NEXT: 000000e0 l O .data 00000004 (idx: [[#NFA+31]]) si[TC]
+; SYM-DES-NEXT: 000000e4 l O .data 00000004 (idx: [[#NFA+33]]) ei[TC]
+; SYM-DES-NEXT: 000000e8 l O .data 00000004 (idx: [[#NFA+35]]) con[TC]
+; SYM-DES-NEXT: 000000ec l O *COM* 00000004 (idx: [[#NFA+37]]) si[BS]
>From b6c2cf7434f55eb577478ea8f1e672b67fef4853 Mon Sep 17 00:00:00 2001
From: Stephen Peckham <speckham at us.ibm.com>
Date: Mon, 5 Feb 2024 11:00:55 -0500
Subject: [PATCH 2/2] Review updates
---
llvm/include/llvm/MC/MCAssembler.h | 9 +++------
llvm/lib/MC/MCObjectStreamer.cpp | 3 +--
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index 4e0c627808605..3fa5f2fe655e8 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -488,12 +488,9 @@ class MCAssembler {
FileNames.emplace_back(std::string(FileName), Symbols.size());
}
- bool setCompilerVersion(std::string CompilerVers) {
- if (CompilerVersion.empty()) {
- CompilerVersion = CompilerVers;
- return true;
- }
- return false;
+ void setCompilerVersion(std::string CompilerVers) {
+ if (CompilerVersion.empty())
+ CompilerVersion = std::move(CompilerVers);
}
StringRef getCompilerVersion() { return CompilerVersion; }
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index cf53ac2d04102..a32fef8a81b4b 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -902,8 +902,7 @@ void MCObjectStreamer::emitFileDirective(StringRef Filename,
StringRef TimeStamp,
StringRef Description) {
getAssembler().addFileName(Filename);
- if (!CompilerVerion.empty())
- getAssembler().setCompilerVersion(CompilerVerion.data());
+ getAssembler().setCompilerVersion(CompilerVerion.str());
// TODO: add TimeStamp and Description to .file symbol table entry
// with the integrated assembler.
}
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