[llvm] [clang] [RISCV] Add -march support for many of the S extensions mentioned in the profile specification. (PR #79399)

[Craig Topper via cfe-commits]

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@@ -764,6 +771,62 @@ def FeatureStdExtSmepmp
     : SubtargetFeature<"smepmp", "HasStdExtSmepmp", "true",
                        "'Smepmp' (Enhanced Physical Memory Protection)", []>;
 
+def FeatureStdExtSsccptr
+    : SubtargetFeature<"ssccptr", "HasStdExtSsccptr", "true",
+                       "'Ssccptr' (Main memory supports page table reads)", []>;
+
+def FeatureStdExtShcounterenvw
+    : SubtargetFeature<"shcounterenw", "HasStdExtShcounterenw", "true",
+                       "'Shcounterenw' (Support writeable enables for any supproted counter)", []>;
+def FeatureStdExtSscounterenvw
+    : SubtargetFeature<"sscounterenw", "HasStdExtSscounterenw", "true",
+                       "'Sscounterenw' (Support writeable enables for any supproted counter)", []>;
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topperc wrote:

This bit is about the counter enable not the counter itself.

The privilege spec says "All counters should be implemented, but a legal implementation is to make both the counter and its corresponding event selector be read-only 0."

And in the section in scounteren it says "scounteren must be implemented. However, any of the bits may be read-only zero, indicating reads to the corresponding counter will cause an exception when executing in U-mode."

I think this means without sscounterenw, it is legal to have a hpmcounter that is not read-only zero that is only exposable to S-mode because the scounteren bit to expose it to U-mode isn't writable.

https://github.com/llvm/llvm-project/pull/79399