[clang] [Clang][RISCV] Add assumptions to vsetvli/vsetvlimax (PR #79975)

[Wang Pengcheng via cfe-commits]

wangpc-pp wrote:

> I'm concerned that llvm.assume is handled differently than a branch to unreachable in the middle end. 

Actually the CodeGen part is written by referring to the LLVM IR generated by unreachable way (https://godbolt.org/z/vf1v7f744).

> Have you tested that these assumes have the intended effect?

Yes, the end-to-end tests show that we can generate the same assemblies. I will add a test later.

https://github.com/llvm/llvm-project/pull/79975