[clang] [Clang][RISCV] Add assumptions to vsetvli/vsetvlimax (PR #79975)
Wang Pengcheng via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 30 02:31:46 PST 2024
https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/79975
There are some assumptions of the return value of vsetvli/vsetvlimax,
we add them via `llvm.assume` so that middle-end optimizations can
benefit from them.
>From 5b9c6d91a47da63d278983ab1e64b25739200ffa Mon Sep 17 00:00:00 2001
From: wangpc <wangpengcheng.pp at bytedance.com>
Date: Tue, 30 Jan 2024 18:31:28 +0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.4
---
clang/include/clang/Basic/riscv_vector.td | 100 ++-
.../non-policy/non-overloaded/vsetvl.c | 619 ++++++++++++++++--
.../non-policy/non-overloaded/vsetvlmax.c | 312 +++++++--
.../policy/non-overloaded/vsetvl.c | 619 ++++++++++++++++--
.../policy/non-overloaded/vsetvlmax.c | 312 +++++++--
.../rvv-intrinsics-handcrafted/rvv-error.c | 10 +-
6 files changed, 1791 insertions(+), 181 deletions(-)
diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td
index a00ca353588ed..84f61e3be4cfa 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -669,10 +669,104 @@ let HasBuiltinAlias = false,
HasVL = false,
HasMasked = false,
MaskedPolicyScheme = NonePolicy,
- Log2LMUL = [0],
- ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type
-{
+ Log2LMUL = [0] in {
+
+ let ManualCodegen = [{
+ {
+ // Set XLEN type
+ IntrinsicTypes = {ResultType};
+ llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+ llvm::Value *VSetVL = Builder.CreateCall(F, Ops, "vl");
+
+ const TargetInfo &TI = getContext().getTargetInfo();
+ auto VScale = TI.getVScaleRange(getContext().getLangOpts());
+
+ if (VScale && VScale->first && VScale->first == VScale->second) {
+ // Assumptions:
+ // Let:
+ // fixed_vl = __riscv_v_fixed_vlen / 8;
+ // We have:
+ // (avl > fixed_vl || vl == avl)
+ // and
+ // (avl < fixed_vl * 2 || vl == fixed_vl)
+ Value *FixedVL = llvm::ConstantInt::get(ResultType, VScale->first * 8);
+ Value *FixedVLx2 =
+ llvm::ConstantInt::get(ResultType, VScale->first * 8 * 2);
+ Value *Cond0 = Builder.CreateICmpULE(
+ Ops[0], ConstantInt::get(ResultType, VScale->first * 8));
+
+ BasicBlock *AssumptionBlock =
+ createBasicBlock("assumption", this->CurFn);
+ BasicBlock *AssumptionEndBlock =
+ createBasicBlock("assumption_end", this->CurFn);
+ Builder.CreateCondBr(Cond0, AssumptionBlock, AssumptionEndBlock);
+
+ Builder.SetInsertPoint(AssumptionBlock);
+ Builder.CreateAssumption(Builder.CreateICmpEQ(VSetVL, Ops[0]));
+ Builder.CreateBr(AssumptionEndBlock);
+
+ Builder.SetInsertPoint(AssumptionEndBlock);
+ Value *Assumption0 = Builder.CreateICmpULT(Ops[0], FixedVLx2);
+ Value *Assumption1 = Builder.CreateICmpEQ(VSetVL, FixedVL);
+ Builder.CreateAssumption(Builder.CreateSelect(
+ Assumption0, ConstantInt::getTrue(getLLVMContext()), Assumption1));
+ } else {
+ // Assumptions:
+ // Let:
+ // min_vl = __riscv_v_min_vlen / 8
+ // We have:
+ // (avl > min_vl || vl == avl)
+ Value *Cond0 = Builder.CreateICmpULE(
+ Ops[0], ConstantInt::get(ResultType, VScale->first * 8));
+
+ BasicBlock *AssumptionBlock = createBasicBlock("assumption", this->CurFn);
+ BasicBlock *AssumptionEndBlock = createBasicBlock("assumption_end", this->CurFn);
+ Builder.CreateCondBr(Cond0, AssumptionBlock, AssumptionEndBlock);
+
+ Builder.SetInsertPoint(AssumptionBlock);
+ Value *Assumption = Builder.CreateICmpEQ(VSetVL, Ops[0]);
+ Builder.CreateAssumption(Assumption);
+ Builder.CreateBr(AssumptionEndBlock);
+
+ Builder.SetInsertPoint(AssumptionEndBlock);
+ }
+ return VSetVL;
+ }
+ }] in
def vsetvli : RVVBuiltin<"", "zzKzKz", "i">;
+
+ let ManualCodegen = [{
+ {
+ // Set XLEN type
+ IntrinsicTypes = {ResultType};
+ llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+ llvm::Value *VSetVL = Builder.CreateCall(F, Ops, "vl");
+
+ const TargetInfo &TI = getContext().getTargetInfo();
+ auto VScale = TI.getVScaleRange(getContext().getLangOpts());
+
+ Value *Assumption;
+ if (VScale && VScale->first && VScale->first == VScale->second)
+ // Assumptions:
+ // Let:
+ // fixed_vl = __riscv_v_fixed_vlen / 8;
+ // We have:
+ // vlmax == fixed_vl
+ Assumption = Builder.CreateICmpEQ(
+ VSetVL, llvm::ConstantInt::get(ResultType, VScale->first * 8));
+ else
+ // Assumptions:
+ // Let:
+ // min_vl = __riscv_v_min_vlen / 8
+ // We have:
+ // vlmax >= min_vl
+ Assumption = Builder.CreateICmpUGE(
+ VSetVL, ConstantInt::get(ResultType, VScale->first * 8));
+
+ Builder.CreateAssumption(Assumption);
+ return VSetVL;
+ }
+ }] in
def vsetvlimax : RVVBuiltin<"", "zKzKz", "i">;
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
index 26d2e0a4868d5..42f465e33f6fd 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
@@ -3,14 +3,41 @@
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
+// RUN: -mvscale-min=2 -mvscale-max=2 -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN: FileCheck --check-prefix=CHECK-RV64-FIXED %s
#include <riscv_vector.h>
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf8(size_t avl) {
return __riscv_vsetvl_e8mf8(avl);
@@ -19,8 +46,32 @@ size_t test_vsetvl_e8mf8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf4(size_t avl) {
return __riscv_vsetvl_e8mf4(avl);
@@ -29,8 +80,32 @@ size_t test_vsetvl_e8mf4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf2(size_t avl) {
return __riscv_vsetvl_e8mf2(avl);
@@ -39,8 +114,32 @@ size_t test_vsetvl_e8mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m1(size_t avl) {
return __riscv_vsetvl_e8m1(avl);
@@ -49,8 +148,32 @@ size_t test_vsetvl_e8m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m2(size_t avl) {
return __riscv_vsetvl_e8m2(avl);
@@ -59,8 +182,32 @@ size_t test_vsetvl_e8m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m4(size_t avl) {
return __riscv_vsetvl_e8m4(avl);
@@ -69,8 +216,32 @@ size_t test_vsetvl_e8m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m8(size_t avl) {
return __riscv_vsetvl_e8m8(avl);
@@ -79,8 +250,32 @@ size_t test_vsetvl_e8m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16mf4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16mf4(size_t avl) {
return __riscv_vsetvl_e16mf4(avl);
@@ -89,8 +284,32 @@ size_t test_vsetvl_e16mf4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16mf2(size_t avl) {
return __riscv_vsetvl_e16mf2(avl);
@@ -99,8 +318,32 @@ size_t test_vsetvl_e16mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m1(size_t avl) {
return __riscv_vsetvl_e16m1(avl);
@@ -109,8 +352,32 @@ size_t test_vsetvl_e16m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m2(size_t avl) {
return __riscv_vsetvl_e16m2(avl);
@@ -119,8 +386,32 @@ size_t test_vsetvl_e16m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m4(size_t avl) {
return __riscv_vsetvl_e16m4(avl);
@@ -129,8 +420,32 @@ size_t test_vsetvl_e16m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m8(size_t avl) {
return __riscv_vsetvl_e16m8(avl);
@@ -139,8 +454,32 @@ size_t test_vsetvl_e16m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32mf2(size_t avl) {
return __riscv_vsetvl_e32mf2(avl);
@@ -149,8 +488,32 @@ size_t test_vsetvl_e32mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m1(size_t avl) {
return __riscv_vsetvl_e32m1(avl);
@@ -159,8 +522,32 @@ size_t test_vsetvl_e32m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m2(size_t avl) {
return __riscv_vsetvl_e32m2(avl);
@@ -169,8 +556,32 @@ size_t test_vsetvl_e32m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m4(size_t avl) {
return __riscv_vsetvl_e32m4(avl);
@@ -179,8 +590,32 @@ size_t test_vsetvl_e32m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m8(size_t avl) {
return __riscv_vsetvl_e32m8(avl);
@@ -189,8 +624,32 @@ size_t test_vsetvl_e32m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m1(size_t avl) {
return __riscv_vsetvl_e64m1(avl);
@@ -199,8 +658,32 @@ size_t test_vsetvl_e64m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m2(size_t avl) {
return __riscv_vsetvl_e64m2(avl);
@@ -209,8 +692,32 @@ size_t test_vsetvl_e64m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m4(size_t avl) {
return __riscv_vsetvl_e64m4(avl);
@@ -219,8 +726,32 @@ size_t test_vsetvl_e64m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m8(size_t avl) {
return __riscv_vsetvl_e64m8(avl);
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
index 792e43c22f519..fd6d091df6910 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
@@ -3,14 +3,28 @@
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
+// RUN: -mvscale-min=2 -mvscale-max=2 -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN: FileCheck --check-prefix=CHECK-RV64-FIXED %s
+
#include <riscv_vector.h>
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf8
// CHECK-RV64-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf8() {
return __riscv_vsetvlmax_e8mf8();
@@ -19,8 +33,18 @@ size_t test_vsetvlmax_e8mf8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf4() {
return __riscv_vsetvlmax_e8mf4();
@@ -29,8 +53,18 @@ size_t test_vsetvlmax_e8mf4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf2() {
return __riscv_vsetvlmax_e8mf2();
@@ -39,8 +73,18 @@ size_t test_vsetvlmax_e8mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m1() {
return __riscv_vsetvlmax_e8m1();
@@ -49,8 +93,18 @@ size_t test_vsetvlmax_e8m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m2() {
return __riscv_vsetvlmax_e8m2();
@@ -59,8 +113,18 @@ size_t test_vsetvlmax_e8m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m4() {
return __riscv_vsetvlmax_e8m4();
@@ -69,8 +133,18 @@ size_t test_vsetvlmax_e8m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m8() {
return __riscv_vsetvlmax_e8m8();
@@ -79,8 +153,18 @@ size_t test_vsetvlmax_e8m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16mf4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16mf4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16mf4() {
return __riscv_vsetvlmax_e16mf4();
@@ -89,8 +173,18 @@ size_t test_vsetvlmax_e16mf4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16mf2() {
return __riscv_vsetvlmax_e16mf2();
@@ -99,8 +193,18 @@ size_t test_vsetvlmax_e16mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m1() {
return __riscv_vsetvlmax_e16m1();
@@ -109,8 +213,18 @@ size_t test_vsetvlmax_e16m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m2() {
return __riscv_vsetvlmax_e16m2();
@@ -119,8 +233,18 @@ size_t test_vsetvlmax_e16m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m4() {
return __riscv_vsetvlmax_e16m4();
@@ -129,8 +253,18 @@ size_t test_vsetvlmax_e16m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m8() {
return __riscv_vsetvlmax_e16m8();
@@ -139,8 +273,18 @@ size_t test_vsetvlmax_e16m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32mf2() {
return __riscv_vsetvlmax_e32mf2();
@@ -149,8 +293,18 @@ size_t test_vsetvlmax_e32mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m1() {
return __riscv_vsetvlmax_e32m1();
@@ -159,8 +313,18 @@ size_t test_vsetvlmax_e32m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m2() {
return __riscv_vsetvlmax_e32m2();
@@ -169,8 +333,18 @@ size_t test_vsetvlmax_e32m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m4() {
return __riscv_vsetvlmax_e32m4();
@@ -179,8 +353,18 @@ size_t test_vsetvlmax_e32m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m8() {
return __riscv_vsetvlmax_e32m8();
@@ -189,8 +373,18 @@ size_t test_vsetvlmax_e32m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m1() {
return __riscv_vsetvlmax_e64m1();
@@ -199,8 +393,18 @@ size_t test_vsetvlmax_e64m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m2() {
return __riscv_vsetvlmax_e64m2();
@@ -209,8 +413,18 @@ size_t test_vsetvlmax_e64m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m4() {
return __riscv_vsetvlmax_e64m4();
@@ -219,8 +433,18 @@ size_t test_vsetvlmax_e64m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m8() {
return __riscv_vsetvlmax_e64m8();
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
index 26d2e0a4868d5..42f465e33f6fd 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
@@ -3,14 +3,41 @@
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
+// RUN: -mvscale-min=2 -mvscale-max=2 -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN: FileCheck --check-prefix=CHECK-RV64-FIXED %s
#include <riscv_vector.h>
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf8(size_t avl) {
return __riscv_vsetvl_e8mf8(avl);
@@ -19,8 +46,32 @@ size_t test_vsetvl_e8mf8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf4(size_t avl) {
return __riscv_vsetvl_e8mf4(avl);
@@ -29,8 +80,32 @@ size_t test_vsetvl_e8mf4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8mf2(size_t avl) {
return __riscv_vsetvl_e8mf2(avl);
@@ -39,8 +114,32 @@ size_t test_vsetvl_e8mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m1(size_t avl) {
return __riscv_vsetvl_e8m1(avl);
@@ -49,8 +148,32 @@ size_t test_vsetvl_e8m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m2(size_t avl) {
return __riscv_vsetvl_e8m2(avl);
@@ -59,8 +182,32 @@ size_t test_vsetvl_e8m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m4(size_t avl) {
return __riscv_vsetvl_e8m4(avl);
@@ -69,8 +216,32 @@ size_t test_vsetvl_e8m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e8m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e8m8(size_t avl) {
return __riscv_vsetvl_e8m8(avl);
@@ -79,8 +250,32 @@ size_t test_vsetvl_e8m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16mf4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16mf4(size_t avl) {
return __riscv_vsetvl_e16mf4(avl);
@@ -89,8 +284,32 @@ size_t test_vsetvl_e16mf4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16mf2(size_t avl) {
return __riscv_vsetvl_e16mf2(avl);
@@ -99,8 +318,32 @@ size_t test_vsetvl_e16mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m1(size_t avl) {
return __riscv_vsetvl_e16m1(avl);
@@ -109,8 +352,32 @@ size_t test_vsetvl_e16m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m2(size_t avl) {
return __riscv_vsetvl_e16m2(avl);
@@ -119,8 +386,32 @@ size_t test_vsetvl_e16m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m4(size_t avl) {
return __riscv_vsetvl_e16m4(avl);
@@ -129,8 +420,32 @@ size_t test_vsetvl_e16m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e16m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e16m8(size_t avl) {
return __riscv_vsetvl_e16m8(avl);
@@ -139,8 +454,32 @@ size_t test_vsetvl_e16m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32mf2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32mf2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32mf2(size_t avl) {
return __riscv_vsetvl_e32mf2(avl);
@@ -149,8 +488,32 @@ size_t test_vsetvl_e32mf2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m1(size_t avl) {
return __riscv_vsetvl_e32m1(avl);
@@ -159,8 +522,32 @@ size_t test_vsetvl_e32m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m2(size_t avl) {
return __riscv_vsetvl_e32m2(avl);
@@ -169,8 +556,32 @@ size_t test_vsetvl_e32m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m4(size_t avl) {
return __riscv_vsetvl_e32m4(avl);
@@ -179,8 +590,32 @@ size_t test_vsetvl_e32m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e32m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e32m8(size_t avl) {
return __riscv_vsetvl_e32m8(avl);
@@ -189,8 +624,32 @@ size_t test_vsetvl_e32m8(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m1
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m1
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m1(size_t avl) {
return __riscv_vsetvl_e64m1(avl);
@@ -199,8 +658,32 @@ size_t test_vsetvl_e64m1(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m2
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m2
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m2(size_t avl) {
return __riscv_vsetvl_e64m2(avl);
@@ -209,8 +692,32 @@ size_t test_vsetvl_e64m2(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m4
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m4
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m4(size_t avl) {
return __riscv_vsetvl_e64m4(avl);
@@ -219,8 +726,32 @@ size_t test_vsetvl_e64m4(size_t avl) {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m8
// CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64: assumption:
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64: assumption_end:
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvl_e64m8
+// CHECK-RV64-FIXED-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp ule i64 [[AVL]], 16
+// CHECK-RV64-FIXED-NEXT: br i1 [[TMP0]], label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64-FIXED: assumption:
+// CHECK-RV64-FIXED-NEXT: [[TMP1:%.*]] = icmp eq i64 [[VL]], [[AVL]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP1]])
+// CHECK-RV64-FIXED-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64-FIXED: assumption_end:
+// CHECK-RV64-FIXED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[AVL]], 32
+// CHECK-RV64-FIXED-NEXT: [[TMP3:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP4]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvl_e64m8(size_t avl) {
return __riscv_vsetvl_e64m8(avl);
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
index 792e43c22f519..fd6d091df6910 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
@@ -3,14 +3,28 @@
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
+// RUN: -mvscale-min=2 -mvscale-max=2 -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN: FileCheck --check-prefix=CHECK-RV64-FIXED %s
+
#include <riscv_vector.h>
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf8
// CHECK-RV64-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf8() {
return __riscv_vsetvlmax_e8mf8();
@@ -19,8 +33,18 @@ size_t test_vsetvlmax_e8mf8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf4() {
return __riscv_vsetvlmax_e8mf4();
@@ -29,8 +53,18 @@ size_t test_vsetvlmax_e8mf4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8mf2() {
return __riscv_vsetvlmax_e8mf2();
@@ -39,8 +73,18 @@ size_t test_vsetvlmax_e8mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m1() {
return __riscv_vsetvlmax_e8m1();
@@ -49,8 +93,18 @@ size_t test_vsetvlmax_e8m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m2() {
return __riscv_vsetvlmax_e8m2();
@@ -59,8 +113,18 @@ size_t test_vsetvlmax_e8m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m4() {
return __riscv_vsetvlmax_e8m4();
@@ -69,8 +133,18 @@ size_t test_vsetvlmax_e8m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e8m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e8m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e8m8() {
return __riscv_vsetvlmax_e8m8();
@@ -79,8 +153,18 @@ size_t test_vsetvlmax_e8m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16mf4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16mf4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16mf4() {
return __riscv_vsetvlmax_e16mf4();
@@ -89,8 +173,18 @@ size_t test_vsetvlmax_e16mf4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16mf2() {
return __riscv_vsetvlmax_e16mf2();
@@ -99,8 +193,18 @@ size_t test_vsetvlmax_e16mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m1() {
return __riscv_vsetvlmax_e16m1();
@@ -109,8 +213,18 @@ size_t test_vsetvlmax_e16m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m2() {
return __riscv_vsetvlmax_e16m2();
@@ -119,8 +233,18 @@ size_t test_vsetvlmax_e16m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m4() {
return __riscv_vsetvlmax_e16m4();
@@ -129,8 +253,18 @@ size_t test_vsetvlmax_e16m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e16m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e16m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e16m8() {
return __riscv_vsetvlmax_e16m8();
@@ -139,8 +273,18 @@ size_t test_vsetvlmax_e16m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32mf2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32mf2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32mf2() {
return __riscv_vsetvlmax_e32mf2();
@@ -149,8 +293,18 @@ size_t test_vsetvlmax_e32mf2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m1() {
return __riscv_vsetvlmax_e32m1();
@@ -159,8 +313,18 @@ size_t test_vsetvlmax_e32m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m2() {
return __riscv_vsetvlmax_e32m2();
@@ -169,8 +333,18 @@ size_t test_vsetvlmax_e32m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m4() {
return __riscv_vsetvlmax_e32m4();
@@ -179,8 +353,18 @@ size_t test_vsetvlmax_e32m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e32m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e32m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e32m8() {
return __riscv_vsetvlmax_e32m8();
@@ -189,8 +373,18 @@ size_t test_vsetvlmax_e32m8() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m1
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m1
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m1() {
return __riscv_vsetvlmax_e64m1();
@@ -199,8 +393,18 @@ size_t test_vsetvlmax_e64m1() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m2
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m2
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m2() {
return __riscv_vsetvlmax_e64m2();
@@ -209,8 +413,18 @@ size_t test_vsetvlmax_e64m2() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m4
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m4
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m4() {
return __riscv_vsetvlmax_e64m4();
@@ -219,8 +433,18 @@ size_t test_vsetvlmax_e64m4() {
// CHECK-RV64-LABEL: define dso_local i64 @test_vsetvlmax_e64m8
// CHECK-RV64-SAME: () #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
-// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
-// CHECK-RV64-NEXT: ret i64 [[TMP0]]
+// CHECK-RV64-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
+// CHECK-RV64-NEXT: [[TMP0:%.*]] = icmp uge i64 [[VL]], 16
+// CHECK-RV64-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-NEXT: ret i64 [[VL]]
+//
+// CHECK-RV64-FIXED-LABEL: define dso_local i64 @test_vsetvlmax_e64m8
+// CHECK-RV64-FIXED-SAME: () #[[ATTR0]] {
+// CHECK-RV64-FIXED-NEXT: entry:
+// CHECK-RV64-FIXED-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3)
+// CHECK-RV64-FIXED-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 16
+// CHECK-RV64-FIXED-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64-FIXED-NEXT: ret i64 [[VL]]
//
size_t test_vsetvlmax_e64m8() {
return __riscv_vsetvlmax_e64m8();
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-error.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-error.c
index 6ec9b05799769..601cc379563cf 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-error.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-error.c
@@ -6,8 +6,14 @@
// CHECK-RV64V-LABEL: @test(
// CHECK-RV64V-NEXT: entry:
-// CHECK-RV64V-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 1, i64 0, i64 0)
-// CHECK-RV64V-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
+// CHECK-RV64V-NEXT: [[VL:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 1, i64 0, i64 0)
+// CHECK-RV64V-NEXT: br i1 true, label [[ASSUMPTION:%.*]], label [[ASSUMPTION_END:%.*]]
+// CHECK-RV64V: assumption:
+// CHECK-RV64V-NEXT: [[TMP0:%.*]] = icmp eq i64 [[VL]], 1
+// CHECK-RV64V-NEXT: call void @llvm.assume(i1 [[TMP0]])
+// CHECK-RV64V-NEXT: br label [[ASSUMPTION_END]]
+// CHECK-RV64V: assumption_end:
+// CHECK-RV64V-NEXT: [[CONV:%.*]] = trunc i64 [[VL]] to i32
// CHECK-RV64V-NEXT: ret i32 [[CONV]]
//
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