[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)

[Wang Pengcheng via cfe-commits]

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@@ -1082,6 +1082,13 @@ def TuneShortForwardBranchOpt
 def HasShortForwardBranchOpt : Predicate<"Subtarget->hasShortForwardBranchOpt()">;
 def NoShortForwardBranchOpt : Predicate<"!Subtarget->hasShortForwardBranchOpt()">;
 
+// P670 requires a S2V transfer buffer to move scalars into vectors.
+// FIXME: Forming .vx/.vf can reduce register pressure.
+def TuneDontSinkSplatOperands
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wangpc-pp wrote:

This can be split into another PR.

https://github.com/llvm/llvm-project/pull/79015