[llvm] [clang] [SPARC] Support reserving arbitrary general purpose registers (PR #74927)

[Sergei Barannikov via cfe-commits]

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@@ -29,6 +29,12 @@ namespace llvm {
 class StringRef;
 
 class SparcSubtarget : public SparcGenSubtargetInfo {
+  // Reserve*Register[i] - *#i is not available as a general purpose register.
+  BitVector ReserveGRegister;
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s-barannikov wrote:

Can this be a single `BitVector` indexed by physical register number? This would simplify `TRI.getReservedRegs()`, I think.


https://github.com/llvm/llvm-project/pull/74927