[llvm] [clang] [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (PR #76777)
Wang Pengcheng via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 9 20:01:06 PST 2024
================
@@ -985,9 +1003,10 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
};
for (auto Reg : CSRegs)
- SavedRegs.set(Reg);
+ if (Reg < RISCV::X16 || !Subtarget.isRVE())
----------------
wangpc-pp wrote:
The psABI says:
> If used with an ISA that has any of the registers x16-x31 and f0-f31, then these registers are considered temporaries.
So I think we should.
https://github.com/llvm/llvm-project/pull/76777
More information about the cfe-commits
mailing list