[libunwind] [clang-tools-extra] [lld] [llvm] [lldb] [compiler-rt] [libclc] [libc] [clang] [libcxxabi] [flang] [libcxx] [Legalizer] Soften EXTRACT_ELEMENT on ppcf128 (PR #77412)

[Qiu Chaofan via cfe-commits]

https://github.com/ecnelises updated https://github.com/llvm/llvm-project/pull/77412

>From 87e1d4acdd87d45f265e590ad135e21f352dc5ad Mon Sep 17 00:00:00 2001
From: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: Tue, 9 Jan 2024 13:33:56 +0800
Subject: [PATCH 1/2] [Legalizer] Soften EXTRACT_ELEMENT on ppcf128

ppc_fp128 values are always split into two f64. Implement soften
operation in soft-float mode to handle output f64 correctly.
---
 .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp    | 14 +++++++++++++-
 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h      |  1 +
 llvm/test/CodeGen/PowerPC/ppcsoftops.ll            | 10 ++++++++++
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 6e0e1e23419bec..69759a7d6471f6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -60,7 +60,9 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
 #endif
     report_fatal_error("Do not know how to soften the result of this "
                        "operator!");
-
+    case ISD::EXTRACT_ELEMENT:
+      R = SoftenFloatRes_EXTRACT_ELEMENT(N);
+      break;
     case ISD::ARITH_FENCE: R = SoftenFloatRes_ARITH_FENCE(N); break;
     case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
     case ISD::BITCAST:     R = SoftenFloatRes_BITCAST(N); break;
@@ -262,6 +264,16 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N) {
   }
 }
 
+SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_ELEMENT(SDNode *N) {
+  SDValue Src = N->getOperand(0);
+  assert(Src.getValueType() == MVT::ppcf128 &&
+         Src.getOperand(0)->getOpcode() == ISD::BUILD_PAIR &&
+         "In floats only ppcf128 can be extracted by element!");
+  EVT DestVT = EVT::getIntegerVT(*DAG.getContext(), N->getValueSizeInBits(0));
+  return DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(N), DestVT,
+                     Src.getOperand(0), N->getOperand(1));
+}
+
 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
   SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
   return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index 09f0bca8b8611e..efe8ac536b63bd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -541,6 +541,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
   SDValue SoftenFloatRes_BITCAST(SDNode *N);
   SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
   SDValue SoftenFloatRes_ConstantFP(SDNode *N);
+  SDValue SoftenFloatRes_EXTRACT_ELEMENT(SDNode *N);
   SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
   SDValue SoftenFloatRes_FABS(SDNode *N);
   SDValue SoftenFloatRes_FMINNUM(SDNode *N);
diff --git a/llvm/test/CodeGen/PowerPC/ppcsoftops.ll b/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
index 0ee30f67c30f24..4c74798cf0ea5b 100644
--- a/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ b/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -68,8 +68,18 @@ define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
   ; CHECK-LABEL:      __adddf3
 }
 
+; To check ppc_fp128 soften without crash
+define zeroext i1 @ppcf128_soften(ppc_fp128 %a) #0 {
+entry:
+  %0 = tail call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %a, i32 100)
+  ret i1 %0
+
+  ; CHECK-LABEL: ppcf128_soften
+}
+
 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
 declare double @llvm.fmuladd.f64(double, double, double) #1
+declare i1 @llvm.is.fpclass.ppcf128(ppc_fp128, i32 immarg) #1
 
 attributes #0 = {"use-soft-float"="true" }
 attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

>From 2a222d9adcd086b9b25724ed31ae1478100e334a Mon Sep 17 00:00:00 2001
From: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: Wed, 10 Jan 2024 10:46:32 +0800
Subject: [PATCH 2/2] Use changeTypeToInteger

---
 llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 5 ++---
 llvm/test/CodeGen/PowerPC/ppcsoftops.ll              | 4 ++--
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index ecbf3ce94a3807..fac2a85e77b7b9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -267,10 +267,9 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N) {
 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_ELEMENT(SDNode *N) {
   SDValue Src = N->getOperand(0);
   assert(Src.getValueType() == MVT::ppcf128 &&
-         Src.getOperand(0)->getOpcode() == ISD::BUILD_PAIR &&
          "In floats only ppcf128 can be extracted by element!");
-  EVT DestVT = EVT::getIntegerVT(*DAG.getContext(), N->getValueSizeInBits(0));
-  return DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(N), DestVT,
+  return DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(N),
+                     N->getValueType(0).changeTypeToInteger(),
                      Src.getOperand(0), N->getOperand(1));
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/ppcsoftops.ll b/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
index 4c74798cf0ea5b..5a72ae4799ca7a 100644
--- a/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ b/llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -71,8 +71,8 @@ define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
 ; To check ppc_fp128 soften without crash
 define zeroext i1 @ppcf128_soften(ppc_fp128 %a) #0 {
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %a, i32 100)
-  ret i1 %0
+  %fpclass = tail call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %a, i32 100)
+  ret i1 %fpclass
 
   ; CHECK-LABEL: ppcf128_soften
 }