[llvm] [clang] [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (PR #76777)
Nemanja Ivanovic via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 9 09:08:13 PST 2024
================
@@ -50,11 +50,14 @@ void RISCVTargetStreamer::setTargetABI(RISCVABI::ABI ABI) {
void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
bool EmitStackAlign) {
- if (STI.hasFeature(RISCV::FeatureRVE))
- report_fatal_error("Codegen not yet implemented for RVE");
-
- if (EmitStackAlign)
- emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_16);
+ if (EmitStackAlign) {
+ if (STI.hasFeature(RISCV::FeatureRVE))
----------------
nemanjai wrote:
This seems to not match what the usage doc above says. Namely, the doc says that the alignment is dependent on the ABI but this uses the ISA feature rather than the ABI.
Furthermore, `getABIStackAlignment()` also obviously uses the ABI rather than the ISA feature.
https://github.com/llvm/llvm-project/pull/76777
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