[clang] [llvm] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)
Paul Kirth via cfe-commits
cfe-commits at lists.llvm.org
Fri Jan 5 16:17:02 PST 2024
================
@@ -151,9 +155,10 @@ Usage
To enable ShadowCallStack, just pass the ``-fsanitize=shadow-call-stack`` flag
to both compile and link command lines. On aarch64, you also need to pass
-``-ffixed-x18`` unless your target already reserves ``x18``. On RISC-V, ``x3``
-(``gp``) is always reserved. It is, however, important to disable GP relaxation
-in the linker. This can be done with the ``--no-relax-gp`` flag in GNU ld.
+``-ffixed-x18`` unless your target already reserves ``x18``. On RISC-V with software
+shadow stack, ``x3`` (``gp``) is always reserved. It is, however, important to
+disable GP relaxation in the linker. This can be done with the ``--no-relax-gp``
+flag in GNU ld.
----------------
ilovepi wrote:
We reserve `gp` even w/o SCS. The `--no-relax-gp` advice does only apply to the software SCS.
Maybe something along these lines?
```suggestion
``-ffixed-x18`` unless your target already reserves ``x18``. No additional flags need to be passed on RISC-V because the software based shadow stack uses ``x3`` (``gp``), which is always reserved, and the hardware based shadow call stack uses a dedicated register, ``ssp``.
However, it is important to disable GP relaxation in the linker when using the software based shadow call stack on RISC-V.
This can be done with the ``--no-relax-gp`` flag in GNU ld, and is off by default in LLD.
```
https://github.com/llvm/llvm-project/pull/68075
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