[llvm] [clang] [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (PR #76777)

[Alex Bradbury via cfe-commits]

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@@ -179,6 +180,11 @@ Assembly Support
 Supported
   Fully supported by the compiler.  This includes everything in Assembly Support, along with - if relevant - C language intrinsics for the instructions and pattern matching by the compiler to recognize idiomatic patterns which can be lowered to the associated instructions.
 
+.. _riscv-rve-note:
+
+``E``
+  Support of RV32E/RV64E and ilp32e/lp64e ABIs are experimental.
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asb wrote:

Maybe this would be a good place to add "To be compatible with the implementation of ilp32e in GCC, we don't use aligned registers to pass variadic arguments and set stack alignment to 4-bytes for types with length of 2*XLEN."

Given this gap in the ABI, it would be good if we could document it somewhere outside of the commit message.

https://github.com/llvm/llvm-project/pull/76777