[llvm] [clang] [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (PR #76777)

[Wang Pengcheng via cfe-commits]

wangpc-pp wrote:

> @wangpc-pp did you have interested on helping psABI side? it would be great if you can help since I suspect I don't have enough bandwidth to deal with that soon.

Yes, I'm glad to. I think what we need to do is to fix some Zdinx issues? :-)

And, I think I have to explain the background here: 
I started to maintain this patch about two years ago when I was in T-head, since they have some old RV32E cores (AFAIK, SiFive has RV32E cores too?) and some customers needed the support of RV32E/ilp32e. Now, both T-head and SiFive didn't release RV32E cores any more, and the RVI doesn't put its focuses on RVE too I think. But I don't think there is no vendor that developed or developing their own RV32E implementations.
Now I am no longer working at T-head and my current work is not about RV32E, so I don't have environment to test it. But I think this patch can work just fine since it has been used in T-head's downstream for a long time (since LLVM 13, IIRC) and @zixuan-wu has reported several issues (already solved) before.
Apart from vendors' need, the request is mainly from Rust language community I think. IIUC, this is for the Rust implementation of SBI (https://github.com/rustsbi/rustsbi). They are using T-head E902 (rv32em?) and RV32E core from SiFive.

So, yeah, I will try my best to fix the ABI issue, but I think we still need the help of the RISC-V community. I will contact with T-head guys to see if they are interested in this.

https://github.com/llvm/llvm-project/pull/76777