[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

[Craig Topper via cfe-commits]

================
@@ -693,6 +693,13 @@ def HasStdExtZimop : Predicate<"Subtarget->hasStdExtZimop()">,
                                AssemblerPredicate<(all_of FeatureStdExtZimop),
                                "'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", "HasStdExtZcmop", "true",
+                                          "'Zcmop' (Compressed May-Be-Operations)",
+                                          [FeatureStdExtZca]>;
----------------
topperc wrote:

I think so. The specs have been very inconsistent on terminology. The fundamental issue is that the specs define hardware and don't think about how `-march` in tools works. What the spec is saying is that if your hardware supports Zcmop, it must support Zca.

https://github.com/llvm/llvm-project/pull/76395