[clang] 1dc715a - [Clang][RISCV] Add missing support for `__riscv_clmulr_32/64` in `riscv_bitmanip.h` (#76289)
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cfe-commits at lists.llvm.org
Sun Dec 24 00:14:26 PST 2023
Author: Yingwei Zheng
Date: 2023-12-24T16:14:22+08:00
New Revision: 1dc715a8a4d058dc8b7afbf9ce3fff5a3ff6e4ef
URL: https://github.com/llvm/llvm-project/commit/1dc715a8a4d058dc8b7afbf9ce3fff5a3ff6e4ef
DIFF: https://github.com/llvm/llvm-project/commit/1dc715a8a4d058dc8b7afbf9ce3fff5a3ff6e4ef.diff
LOG: [Clang][RISCV] Add missing support for `__riscv_clmulr_32/64` in `riscv_bitmanip.h` (#76289)
This patch adds support for `__riscv_clmulr_32/64` in `riscv_bitmanip.h`.
It also fixes the extension requirements of `clmul/clmulh`.
Added:
Modified:
clang/lib/Headers/riscv_bitmanip.h
clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
Removed:
################################################################################
diff --git a/clang/lib/Headers/riscv_bitmanip.h b/clang/lib/Headers/riscv_bitmanip.h
index 044cbaa037e43a..2bc7ee022a96bd 100644
--- a/clang/lib/Headers/riscv_bitmanip.h
+++ b/clang/lib/Headers/riscv_bitmanip.h
@@ -120,7 +120,23 @@ __riscv_zip_32(uint32_t __x) {
#endif
#endif // defined(__riscv_zbkb)
-#if defined(__riscv_zbkc)
+#if defined(__riscv_zbc)
+#if __riscv_xlen == 32
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmulr_32(uint32_t __x, uint32_t __y) {
+ return __builtin_riscv_clmulr_32(__x, __y);
+}
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmulr_64(uint64_t __x, uint64_t __y) {
+ return __builtin_riscv_clmulr_64(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zbc)
+
+#if defined(__riscv_zbkc) || defined(__riscv_zbc)
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
__riscv_clmul_32(uint32_t __x, uint32_t __y) {
return __builtin_riscv_clmul_32(__x, __y);
@@ -144,7 +160,7 @@ __riscv_clmulh_64(uint64_t __x, uint64_t __y) {
return __builtin_riscv_clmulh_64(__x, __y);
}
#endif
-#endif // defined(__riscv_zbkc)
+#endif // defined(__riscv_zbkc) || defined(__riscv_zbc)
#if defined(__riscv_zbkx)
#if __riscv_xlen == 32
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
index ae9153eff155e1..93db3a482ef2bc 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
@@ -6,7 +6,7 @@
// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
// RUN: | FileCheck %s -check-prefix=RV64ZBC
-#include <stdint.h>
+#include <riscv_bitmanip.h>
#if __riscv_xlen == 64
// RV64ZBC-LABEL: @clmul_64(
@@ -15,7 +15,7 @@
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmul_64(uint64_t a, uint64_t b) {
- return __builtin_riscv_clmul_64(a, b);
+ return __riscv_clmul_64(a, b);
}
// RV64ZBC-LABEL: @clmulh_64(
@@ -24,7 +24,7 @@ uint64_t clmul_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmulh_64(uint64_t a, uint64_t b) {
- return __builtin_riscv_clmulh_64(a, b);
+ return __riscv_clmulh_64(a, b);
}
// RV64ZBC-LABEL: @clmulr_64(
@@ -33,7 +33,7 @@ uint64_t clmulh_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i64 [[TMP0]]
//
uint64_t clmulr_64(uint64_t a, uint64_t b) {
- return __builtin_riscv_clmulr_64(a, b);
+ return __riscv_clmulr_64(a, b);
}
#endif
@@ -48,7 +48,7 @@ uint64_t clmulr_64(uint64_t a, uint64_t b) {
// RV64ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmul_32(uint32_t a, uint32_t b) {
- return __builtin_riscv_clmul_32(a, b);
+ return __riscv_clmul_32(a, b);
}
#if __riscv_xlen == 32
@@ -58,7 +58,7 @@ uint32_t clmul_32(uint32_t a, uint32_t b) {
// RV32ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmulh_32(uint32_t a, uint32_t b) {
- return __builtin_riscv_clmulh_32(a, b);
+ return __riscv_clmulh_32(a, b);
}
// RV32ZBC-LABEL: @clmulr_32(
@@ -67,6 +67,6 @@ uint32_t clmulh_32(uint32_t a, uint32_t b) {
// RV32ZBC-NEXT: ret i32 [[TMP0]]
//
uint32_t clmulr_32(uint32_t a, uint32_t b) {
- return __builtin_riscv_clmulr_32(a, b);
+ return __riscv_clmulr_32(a, b);
}
#endif
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