[clang] [Clang][SME] Warn when a function doesn't have ZA state (PR #75805)
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Mon Dec 18 07:01:13 PST 2023
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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<summary>
You can test this locally with the following command:
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``````````bash
git-clang-format --diff d777504355dac9a2a8a7bbba6001d05b936868b2 a1840e028ef8b412ffb13b9d105e34fee54dfaed -- clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c clang/test/Sema/aarch64-incompat-sm-builtin-calls.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp clang/test/Sema/aarch64-sme-intrinsics/acle_sme_target.c clang/utils/TableGen/SveEmitter.cpp clang/utils/TableGen/TableGen.cpp clang/utils/TableGen/TableGenBackends.h
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View the diff from clang-format here.
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``````````diff
diff --git a/clang/utils/TableGen/TableGen.cpp b/clang/utils/TableGen/TableGen.cpp
index c1f2ca15b5..0c9c6f96cd 100644
--- a/clang/utils/TableGen/TableGen.cpp
+++ b/clang/utils/TableGen/TableGen.cpp
@@ -291,11 +291,14 @@ cl::opt<ActionType> Action(
"Generate riscv_vector_builtin_cg.inc for clang"),
clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
"Generate riscv_vector_builtin_sema.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltins, "gen-riscv-sifive-vector-builtins",
+ clEnumValN(GenRISCVSiFiveVectorBuiltins,
+ "gen-riscv-sifive-vector-builtins",
"Generate riscv_sifive_vector_builtins.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinCG, "gen-riscv-sifive-vector-builtin-codegen",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinCG,
+ "gen-riscv-sifive-vector-builtin-codegen",
"Generate riscv_sifive_vector_builtin_cg.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinSema, "gen-riscv-sifive-vector-builtin-sema",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinSema,
+ "gen-riscv-sifive-vector-builtin-sema",
"Generate riscv_sifive_vector_builtin_sema.inc for clang"),
clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
``````````
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https://github.com/llvm/llvm-project/pull/75805
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