[clang] [llvm] [SystemZ] Support i128 as legal type in VRs (PR #74625)

[Ulrich Weigand via cfe-commits]

uweigand wrote:

> I have looked through the changes and made some comments inline.

Thanks for the review!

> Commenting:

Fixed, thanks!

> I happened to notice some cases with room for improvement:

Good catch.  I've not addressed these right now, this can be done as a follow-up.  (The memory case is a bit tedious due to TableGen pattern limitations ...)

> As a side question: I forgot why we can get CCMask '5' here: it seems it should be CCMASK_CMP_NE ('6'), if we reverse the LOC operation..?

No, 5 is correct here.  Reversing XORs the mask with the set of valid bits, so we have 13 ^ 8 == 5.

Looking at the VTM instruction, we have the following valid condition codes (making up the 13, i.e. 0, 1, or 3):
0 - Selected bits all zeros; or all mask bits zero
1 - Selected bits a mix of zeros and ones
2 - n/a
3 - Selected bits all ones

The original mask is 8, i.e. condition code 0 ("selected bits all zeros").  Reversing this needs to check for condition codes 1 or 3, i.e. mask 5 ("selected bits a mix of zeros and ones" or "selected bits all ones").


https://github.com/llvm/llvm-project/pull/74625