[clang] [llvm] [SystemZ] Support i128 as legal type in VRs (PR #74625)

[Ulrich Weigand via cfe-commits]

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@@ -2772,6 +2837,27 @@ static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask,
 // Update the arguments with the TM version if so.
 static void adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL,
                                    Comparison &C) {
+  // Use VECTOR TEST UNDER MASK for i128 operations.
+  if (C.Op0.getValueType() == MVT::i128) {
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uweigand wrote:

Well, we need `VCEQS` to set CC which takes an extra cycle, so it should both be three cycles, but then VTM is shorter.

https://github.com/llvm/llvm-project/pull/74625