[clang] [llvm] [SystemZ] Support i128 as legal type in VRs (PR #74625)
Jonas Paulsson via cfe-commits
cfe-commits at lists.llvm.org
Wed Dec 13 13:47:40 PST 2023
================
@@ -2772,6 +2837,27 @@ static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask,
// Update the arguments with the TM version if so.
static void adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL,
Comparison &C) {
+ // Use VECTOR TEST UNDER MASK for i128 operations.
+ if (C.Op0.getValueType() == MVT::i128) {
----------------
JonPsson1 wrote:
Beneficial? VTM is 3 cycles, while VN + VCEQ = 2...
https://github.com/llvm/llvm-project/pull/74625
More information about the cfe-commits
mailing list