[llvm] [clang-tools-extra] [clang] [Clang][AArch64] Add fix vector types to header into SVE (PR #73258)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Dec 8 02:01:16 PST 2023
https://github.com/CarolineConcatto updated https://github.com/llvm/llvm-project/pull/73258
>From e0f245e8d6a395afac5de471b55358c7b730a170 Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Wed, 22 Nov 2023 10:03:50 +0000
Subject: [PATCH 1/6] [Clang][AArch64] Add fix vector types to header into SVE
This patch is needed for the reduction instructions in sve2.1
It add ta new header to sve with all the fixed vector types.
The new types are only added if neon is not declared.
---
clang/include/clang/Basic/arm_vector_type.td | 13 ++
clang/lib/Headers/CMakeLists.txt | 3 +
.../CodeGen/arm-vector_type-params-returns.c | 113 ++++++++++++++++++
clang/utils/TableGen/NeonEmitter.cpp | 44 +++++++
clang/utils/TableGen/SveEmitter.cpp | 2 +
clang/utils/TableGen/TableGen.cpp | 15 ++-
clang/utils/TableGen/TableGenBackends.h | 1 +
7 files changed, 188 insertions(+), 3 deletions(-)
create mode 100644 clang/include/clang/Basic/arm_vector_type.td
create mode 100644 clang/test/CodeGen/arm-vector_type-params-returns.c
diff --git a/clang/include/clang/Basic/arm_vector_type.td b/clang/include/clang/Basic/arm_vector_type.td
new file mode 100644
index 00000000000000..5018b0cdfc1378
--- /dev/null
+++ b/clang/include/clang/Basic/arm_vector_type.td
@@ -0,0 +1,13 @@
+//===--- arm_vector_type.td - ARM Fixed vector types compiler interface ---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the TableGen definitions from which the ARM BF16 header
+// file will be generated.
+//
+//===----------------------------------------------------------------------===//
+include "arm_neon_incl.td"
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index 8b1e2bc4afa4dc..0beb6ade429204 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -385,6 +385,8 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
clang_generate_header(-gen-arm-mve-header arm_mve.td arm_mve.h)
# Generate arm_cde.h
clang_generate_header(-gen-arm-cde-header arm_cde.td arm_cde.h)
+ # Generate arm_vector_type.h
+ clang_generate_header(-gen-arm-vector-type arm_vector_type.td arm_vector_type.h)
# Add headers to target specific lists
list(APPEND arm_common_generated_files
@@ -401,6 +403,7 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
"${CMAKE_CURRENT_BINARY_DIR}/arm_sve.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_sme_draft_spec_subject_to_change.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_bf16.h"
+ "${CMAKE_CURRENT_BINARY_DIR}/arm_vector_type.h"
)
endif()
if(RISCV IN_LIST LLVM_TARGETS_TO_BUILD)
diff --git a/clang/test/CodeGen/arm-vector_type-params-returns.c b/clang/test/CodeGen/arm-vector_type-params-returns.c
new file mode 100644
index 00000000000000..48c19d01b6257c
--- /dev/null
+++ b/clang/test/CodeGen/arm-vector_type-params-returns.c
@@ -0,0 +1,113 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
+#include <arm_sve.h>
+
+// function return types
+// CHECK-LABEL: define dso_local <8 x half> @test_ret_v8f16(
+// CHECK-SAME: <8 x half> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <8 x half> [[V]]
+//
+float16x8_t test_ret_v8f16(float16x8_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <4 x float> @test_ret_v4f32(
+// CHECK-SAME: <4 x float> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <4 x float> [[V]]
+//
+float32x4_t test_ret_v4f32(float32x4_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <2 x double> @test_ret_v2f64(
+// CHECK-SAME: <2 x double> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <2 x double> [[V]]
+//
+float64x2_t test_ret_v2f64(float64x2_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <8 x bfloat> @test_ret_v8bf16(
+// CHECK-SAME: <8 x bfloat> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <8 x bfloat> [[V]]
+//
+bfloat16x8_t test_ret_v8bf16(bfloat16x8_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_ret_v16s8(
+// CHECK-SAME: <16 x i8> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <16 x i8> [[V]]
+//
+int8x16_t test_ret_v16s8(int8x16_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <8 x i16> @test_ret_v8s16(
+// CHECK-SAME: <8 x i16> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <8 x i16> [[V]]
+//
+int16x8_t test_ret_v8s16(int16x8_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <4 x i32> @test_ret_v32s4(
+// CHECK-SAME: <4 x i32> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <4 x i32> [[V]]
+//
+int32x4_t test_ret_v32s4(int32x4_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <2 x i64> @test_ret_v64s2(
+// CHECK-SAME: <2 x i64> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <2 x i64> [[V]]
+//
+int64x2_t test_ret_v64s2(int64x2_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_ret_v16u8(
+// CHECK-SAME: <16 x i8> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <16 x i8> [[V]]
+//
+uint8x16_t test_ret_v16u8(uint8x16_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <8 x i16> @test_ret_v8u16(
+// CHECK-SAME: <8 x i16> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <8 x i16> [[V]]
+//
+uint16x8_t test_ret_v8u16(uint16x8_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <4 x i32> @test_ret_v32u4(
+// CHECK-SAME: <4 x i32> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <4 x i32> [[V]]
+//
+uint32x4_t test_ret_v32u4(uint32x4_t v) {
+ return v;
+}
+
+// CHECK-LABEL: define dso_local <2 x i64> @test_ret_v64u2(
+// CHECK-SAME: <2 x i64> noundef returned [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: ret <2 x i64> [[V]]
+//
+uint64x2_t test_ret_v64u2(uint64x2_t v) {
+ return v;
+}
diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp
index 4b112972a1ec98..2aefb56b08eb37 100644
--- a/clang/utils/TableGen/NeonEmitter.cpp
+++ b/clang/utils/TableGen/NeonEmitter.cpp
@@ -593,6 +593,8 @@ class NeonEmitter {
// Emit arm_bf16.h.inc
void runBF16(raw_ostream &o);
+ void runVectorType(raw_ostream &o);
+
// Emit all the __builtin prototypes used in arm_neon.h, arm_fp16.h and
// arm_bf16.h
void runHeader(raw_ostream &o);
@@ -2546,6 +2548,44 @@ void NeonEmitter::runFP16(raw_ostream &OS) {
OS << "#endif /* __ARM_FP16_H */\n";
}
+void NeonEmitter::runVectorType(raw_ostream &OS) {
+ OS << "/*===---- arm_vector_type - ARM vector type "
+ "------===\n"
+ " *\n"
+ " *\n"
+ " * Part of the LLVM Project, under the Apache License v2.0 with LLVM "
+ "Exceptions.\n"
+ " * See https://llvm.org/LICENSE.txt for license information.\n"
+ " * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception\n"
+ " *\n"
+ " *===-----------------------------------------------------------------"
+ "------===\n"
+ " */\n\n";
+ OS << "#ifndef __ARM_NEON_TYPES_H\n";
+ OS << "#define __ARM_NEON_TYPES_H\n";
+ OS << "#ifdef __cplusplus\n";
+ OS << "extern \"C\" {\n";
+ OS << "#endif\n";
+ OS << "#ifndef __ARM_NEON_H\n";
+
+ std::string TypedefTypes("QcQsQiQlQUcQUsQUiQUlQhQfQdQb");
+ std::vector<TypeSpec> TDTypeVec = TypeSpec::fromTypeSpecs(TypedefTypes);
+ for (auto &TS : TDTypeVec) {
+ Type T(TS, ".");
+ OS << "typedef __attribute__((vector_size(16))) ";
+
+ Type T2 = T;
+ T2.makeScalar();
+ OS << T2.str();
+ OS << " " << T.str() << ";\n";
+ }
+ OS << "#endif\n";
+ OS << "#ifdef __cplusplus\n";
+ OS << "} // extern \"C\"\n";
+ OS << "#endif\n";
+ OS << "#endif //__ARM_NEON_TYPES_H\n";
+}
+
void NeonEmitter::runBF16(raw_ostream &OS) {
OS << "/*===---- arm_bf16.h - ARM BF16 intrinsics "
"-----------------------------------===\n"
@@ -2640,6 +2680,10 @@ void clang::EmitNeonSema(RecordKeeper &Records, raw_ostream &OS) {
NeonEmitter(Records).runHeader(OS);
}
+void clang::EmitVectorType(RecordKeeper &Records, raw_ostream &OS) {
+ NeonEmitter(Records).runVectorType(OS);
+}
+
void clang::EmitNeonTest(RecordKeeper &Records, raw_ostream &OS) {
llvm_unreachable("Neon test generation no longer implemented!");
}
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index d00989ac0f3beb..3274a25c769bd3 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -1280,6 +1280,7 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
OS << "typedef __SVBfloat16_t svbfloat16_t;\n";
OS << "#include <arm_bf16.h>\n";
+ OS << "#include <arm_vector_type.h>\n";
OS << "typedef __SVFloat32_t svfloat32_t;\n";
OS << "typedef __SVFloat64_t svfloat64_t;\n";
@@ -1724,4 +1725,5 @@ void EmitSmeBuiltinCG(RecordKeeper &Records, raw_ostream &OS) {
void EmitSmeRangeChecks(RecordKeeper &Records, raw_ostream &OS) {
SVEEmitter(Records).createSMERangeChecks(OS);
}
+
} // End namespace clang
diff --git a/clang/utils/TableGen/TableGen.cpp b/clang/utils/TableGen/TableGen.cpp
index 7efb6c731d3e5e..66008ae0c2e3c1 100644
--- a/clang/utils/TableGen/TableGen.cpp
+++ b/clang/utils/TableGen/TableGen.cpp
@@ -73,6 +73,7 @@ enum ActionType {
GenArmNeon,
GenArmFP16,
GenArmBF16,
+ GenArmVectorType,
GenArmNeonSema,
GenArmNeonTest,
GenArmMveHeader,
@@ -229,6 +230,8 @@ cl::opt<ActionType> Action(
clEnumValN(GenArmNeon, "gen-arm-neon", "Generate arm_neon.h for clang"),
clEnumValN(GenArmFP16, "gen-arm-fp16", "Generate arm_fp16.h for clang"),
clEnumValN(GenArmBF16, "gen-arm-bf16", "Generate arm_bf16.h for clang"),
+ clEnumValN(GenArmVectorType, "gen-arm-vector-type",
+ "Generate arm_vector_type.h for clang"),
clEnumValN(GenArmNeonSema, "gen-arm-neon-sema",
"Generate ARM NEON sema support for clang"),
clEnumValN(GenArmNeonTest, "gen-arm-neon-test",
@@ -279,11 +282,14 @@ cl::opt<ActionType> Action(
"Generate riscv_vector_builtin_cg.inc for clang"),
clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
"Generate riscv_vector_builtin_sema.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltins, "gen-riscv-sifive-vector-builtins",
+ clEnumValN(GenRISCVSiFiveVectorBuiltins,
+ "gen-riscv-sifive-vector-builtins",
"Generate riscv_sifive_vector_builtins.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinCG, "gen-riscv-sifive-vector-builtin-codegen",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinCG,
+ "gen-riscv-sifive-vector-builtin-codegen",
"Generate riscv_sifive_vector_builtin_cg.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinSema, "gen-riscv-sifive-vector-builtin-sema",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinSema,
+ "gen-riscv-sifive-vector-builtin-sema",
"Generate riscv_sifive_vector_builtin_sema.inc for clang"),
clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
@@ -449,6 +455,9 @@ bool ClangTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
case GenArmFP16:
EmitFP16(Records, OS);
break;
+ case GenArmVectorType:
+ EmitVectorType(Records, OS);
+ break;
case GenArmBF16:
EmitBF16(Records, OS);
break;
diff --git a/clang/utils/TableGen/TableGenBackends.h b/clang/utils/TableGen/TableGenBackends.h
index d8f447069376bc..b5bf0b56043a8b 100644
--- a/clang/utils/TableGen/TableGenBackends.h
+++ b/clang/utils/TableGen/TableGenBackends.h
@@ -97,6 +97,7 @@ void EmitNeon(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
void EmitFP16(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
void EmitBF16(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
void EmitNeonSema(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
+void EmitVectorType(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
void EmitNeonTest(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
void EmitSveHeader(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);
>From cb36c09632b7f0f238f5b1cc34cd85611afa817d Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Fri, 24 Nov 2023 10:53:03 +0000
Subject: [PATCH 2/6] Fix arm-none-none-eabi tests
---
clang/utils/TableGen/NeonEmitter.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp
index 2aefb56b08eb37..28372d506f1ec2 100644
--- a/clang/utils/TableGen/NeonEmitter.cpp
+++ b/clang/utils/TableGen/NeonEmitter.cpp
@@ -2356,6 +2356,7 @@ void NeonEmitter::run(raw_ostream &OS) {
OS << "#include <stdint.h>\n\n";
OS << "#include <arm_bf16.h>\n";
+ OS << "#include <arm_vector_type.h>\n";
// Emit NEON-specific scalar typedefs.
OS << "typedef float float32_t;\n";
>From 367c57906d36312d6a3725553518a624ba900f8a Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Thu, 30 Nov 2023 18:40:35 +0000
Subject: [PATCH 3/6] Fix header arm_vector_type to work with any header
combination
Now any combination between arm_neon.h and arm_sve.h should work
---
...arm_vector_type.td => arm_vector_types.td} | 2 +-
clang/lib/Headers/CMakeLists.txt | 6 +--
.../CodeGen/arm-vector_type-params-returns.c | 27 +++++++++++--
clang/utils/TableGen/NeonEmitter.cpp | 39 +++++++++++++------
clang/utils/TableGen/SveEmitter.cpp | 2 +-
clang/utils/TableGen/TableGen.cpp | 2 +-
6 files changed, 57 insertions(+), 21 deletions(-)
rename clang/include/clang/Basic/{arm_vector_type.td => arm_vector_types.td} (86%)
diff --git a/clang/include/clang/Basic/arm_vector_type.td b/clang/include/clang/Basic/arm_vector_types.td
similarity index 86%
rename from clang/include/clang/Basic/arm_vector_type.td
rename to clang/include/clang/Basic/arm_vector_types.td
index 5018b0cdfc1378..7b43b62f9e066c 100644
--- a/clang/include/clang/Basic/arm_vector_type.td
+++ b/clang/include/clang/Basic/arm_vector_types.td
@@ -1,4 +1,4 @@
-//===--- arm_vector_type.td - ARM Fixed vector types compiler interface ---===//
+//===--- arm_vector_types.td - ARM Fixed vector types compiler interface ---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index 0beb6ade429204..fac4bdc64e0365 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -385,8 +385,8 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
clang_generate_header(-gen-arm-mve-header arm_mve.td arm_mve.h)
# Generate arm_cde.h
clang_generate_header(-gen-arm-cde-header arm_cde.td arm_cde.h)
- # Generate arm_vector_type.h
- clang_generate_header(-gen-arm-vector-type arm_vector_type.td arm_vector_type.h)
+ # Generate arm_vector_types.h
+ clang_generate_header(-gen-arm-vector-type arm_vector_types.td arm_vector_types.h)
# Add headers to target specific lists
list(APPEND arm_common_generated_files
@@ -403,7 +403,7 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
"${CMAKE_CURRENT_BINARY_DIR}/arm_sve.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_sme_draft_spec_subject_to_change.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_bf16.h"
- "${CMAKE_CURRENT_BINARY_DIR}/arm_vector_type.h"
+ "${CMAKE_CURRENT_BINARY_DIR}/arm_vector_types.h"
)
endif()
if(RISCV IN_LIST LLVM_TARGETS_TO_BUILD)
diff --git a/clang/test/CodeGen/arm-vector_type-params-returns.c b/clang/test/CodeGen/arm-vector_type-params-returns.c
index 48c19d01b6257c..61b617083515a7 100644
--- a/clang/test/CodeGen/arm-vector_type-params-returns.c
+++ b/clang/test/CodeGen/arm-vector_type-params-returns.c
@@ -1,7 +1,28 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
-#include <arm_sve.h>
+
+// RUN: %clang_cc1 -DSVE_HEADER -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
+// RUN: %clang_cc1 -DSVE_HEADER -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
+
+// RUN: %clang_cc1 -DNEON_HEADER -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
+// RUN: %clang_cc1 -DNEON_HEADER -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
+
+// RUN: %clang_cc1 -DSVE_HEADER -DNEON_HEADER -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
+// RUN: %clang_cc1 -DSVE_HEADER -DNEON_HEADER -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
+
+// RUN: %clang_cc1 -DNEON_HEADER -DSVE_HEADER2 -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
+// RUN: %clang_cc1 -DNEON_HEADER -DSVE_HEADER2 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o - /dev/null %s
+
+#ifdef SVE_HEADER
+ #include <arm_sve.h>
+#endif
+
+#ifdef NEON_HEADER
+ #include <arm_neon.h>
+#endif
+
+#ifdef SVE_HEADER_2
+ #include <arm_sve.h>
+#endif
// function return types
// CHECK-LABEL: define dso_local <8 x half> @test_ret_v8f16(
diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp
index 28372d506f1ec2..4053723a2d547f 100644
--- a/clang/utils/TableGen/NeonEmitter.cpp
+++ b/clang/utils/TableGen/NeonEmitter.cpp
@@ -2231,6 +2231,12 @@ void NeonEmitter::runHeader(raw_ostream &OS) {
static void emitNeonTypeDefs(const std::string& types, raw_ostream &OS) {
std::string TypedefTypes(types);
std::vector<TypeSpec> TDTypeVec = TypeSpec::fromTypeSpecs(TypedefTypes);
+ // arm_sve.h followed by arm_neon.h does not emmit these types
+ // because only arm_sve.h defines __ARM_NEON_TYPES_H
+ // arm_neon.h followed by arm_sve.h emmit these types
+ // because __ARM_NEON_TYPES_H is not defined
+ // Avoids to redeclare the types in arm_neon.h
+ OS << "#ifndef __ARM_NEON_TYPES_H\n";
// Emit vector typedefs.
bool InIfdef = false;
@@ -2263,6 +2269,7 @@ static void emitNeonTypeDefs(const std::string& types, raw_ostream &OS) {
if (InIfdef)
OS << "#endif\n";
OS << "\n";
+ OS << "#endif // __ARM_NEON_TYPES_H\n";
// Emit struct typedefs.
InIfdef = false;
@@ -2356,7 +2363,6 @@ void NeonEmitter::run(raw_ostream &OS) {
OS << "#include <stdint.h>\n\n";
OS << "#include <arm_bf16.h>\n";
- OS << "#include <arm_vector_type.h>\n";
// Emit NEON-specific scalar typedefs.
OS << "typedef float float32_t;\n";
@@ -2550,7 +2556,7 @@ void NeonEmitter::runFP16(raw_ostream &OS) {
}
void NeonEmitter::runVectorType(raw_ostream &OS) {
- OS << "/*===---- arm_vector_type - ARM vector type "
+ OS << "/*===---- arm_vector_types - ARM vector type "
"------===\n"
" *\n"
" *\n"
@@ -2562,29 +2568,38 @@ void NeonEmitter::runVectorType(raw_ostream &OS) {
" *===-----------------------------------------------------------------"
"------===\n"
" */\n\n";
+ OS << "#ifndef __ARM_NEON_H\n\n";
OS << "#ifndef __ARM_NEON_TYPES_H\n";
OS << "#define __ARM_NEON_TYPES_H\n";
- OS << "#ifdef __cplusplus\n";
- OS << "extern \"C\" {\n";
+ OS << "#ifdef __aarch64__\n";
+ OS << "typedef uint8_t poly8_t;\n";
+ OS << "typedef uint16_t poly16_t;\n";
+ OS << "typedef uint64_t poly64_t;\n";
+ OS << "typedef __uint128_t poly128_t;\n";
+ OS << "#else\n";
+ OS << "typedef int8_t poly8_t;\n";
+ OS << "typedef int16_t poly16_t;\n";
OS << "#endif\n";
- OS << "#ifndef __ARM_NEON_H\n";
- std::string TypedefTypes("QcQsQiQlQUcQUsQUiQUlQhQfQdQb");
+ // Needs to declare all the types in case there is arm_sve.h followed by
+ // arm_neon.h.
+ // arm_sve defines __ARM_NEON_TYPES_H so it avoids to declare again the
+ // types in arm_neon.h
+ std::string TypedefTypes(
+ "cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQdPcQPcPsQPsPlQPlbQb");
std::vector<TypeSpec> TDTypeVec = TypeSpec::fromTypeSpecs(TypedefTypes);
for (auto &TS : TDTypeVec) {
Type T(TS, ".");
- OS << "typedef __attribute__((vector_size(16))) ";
+ OS << "typedef __attribute__((vector_size(";
+ OS << T.getSizeInBits() / 8 << ")))";
Type T2 = T;
T2.makeScalar();
OS << T2.str();
OS << " " << T.str() << ";\n";
}
- OS << "#endif\n";
- OS << "#ifdef __cplusplus\n";
- OS << "} // extern \"C\"\n";
- OS << "#endif\n";
- OS << "#endif //__ARM_NEON_TYPES_H\n";
+ OS << "#endif // __ARM_NEON_TYPES_H\n";
+ OS << "#endif // __ARM_NEON_H\n";
}
void NeonEmitter::runBF16(raw_ostream &OS) {
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index 3274a25c769bd3..c40faa210e4880 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -1280,7 +1280,7 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
OS << "typedef __SVBfloat16_t svbfloat16_t;\n";
OS << "#include <arm_bf16.h>\n";
- OS << "#include <arm_vector_type.h>\n";
+ OS << "#include <arm_vector_types.h>\n";
OS << "typedef __SVFloat32_t svfloat32_t;\n";
OS << "typedef __SVFloat64_t svfloat64_t;\n";
diff --git a/clang/utils/TableGen/TableGen.cpp b/clang/utils/TableGen/TableGen.cpp
index 66008ae0c2e3c1..8a183531a61d7d 100644
--- a/clang/utils/TableGen/TableGen.cpp
+++ b/clang/utils/TableGen/TableGen.cpp
@@ -231,7 +231,7 @@ cl::opt<ActionType> Action(
clEnumValN(GenArmFP16, "gen-arm-fp16", "Generate arm_fp16.h for clang"),
clEnumValN(GenArmBF16, "gen-arm-bf16", "Generate arm_bf16.h for clang"),
clEnumValN(GenArmVectorType, "gen-arm-vector-type",
- "Generate arm_vector_type.h for clang"),
+ "Generate arm_vector_types.h for clang"),
clEnumValN(GenArmNeonSema, "gen-arm-neon-sema",
"Generate ARM NEON sema support for clang"),
clEnumValN(GenArmNeonTest, "gen-arm-neon-test",
>From e41718e88a0fd0efb0ee17d002e1cc50ff286a19 Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Thu, 7 Dec 2023 09:53:05 +0000
Subject: [PATCH 4/6] Use neon_vector_type for neon and sve headers
---
clang/include/clang/Basic/arm_vector_types.td | 2 +-
clang/utils/TableGen/NeonEmitter.cpp | 60 ++++---------------
clang/utils/TableGen/TableGen.cpp | 9 +--
3 files changed, 16 insertions(+), 55 deletions(-)
diff --git a/clang/include/clang/Basic/arm_vector_types.td b/clang/include/clang/Basic/arm_vector_types.td
index 7b43b62f9e066c..c4476b0a67bd34 100644
--- a/clang/include/clang/Basic/arm_vector_types.td
+++ b/clang/include/clang/Basic/arm_vector_types.td
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
//
-// This file defines the TableGen definitions from which the ARM BF16 header
+// This file defines the TableGen definitions from which the Neon header
// file will be generated.
//
//===----------------------------------------------------------------------===//
diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp
index 4053723a2d547f..4a2de84d47afd7 100644
--- a/clang/utils/TableGen/NeonEmitter.cpp
+++ b/clang/utils/TableGen/NeonEmitter.cpp
@@ -2231,12 +2231,6 @@ void NeonEmitter::runHeader(raw_ostream &OS) {
static void emitNeonTypeDefs(const std::string& types, raw_ostream &OS) {
std::string TypedefTypes(types);
std::vector<TypeSpec> TDTypeVec = TypeSpec::fromTypeSpecs(TypedefTypes);
- // arm_sve.h followed by arm_neon.h does not emmit these types
- // because only arm_sve.h defines __ARM_NEON_TYPES_H
- // arm_neon.h followed by arm_sve.h emmit these types
- // because __ARM_NEON_TYPES_H is not defined
- // Avoids to redeclare the types in arm_neon.h
- OS << "#ifndef __ARM_NEON_TYPES_H\n";
// Emit vector typedefs.
bool InIfdef = false;
@@ -2269,7 +2263,6 @@ static void emitNeonTypeDefs(const std::string& types, raw_ostream &OS) {
if (InIfdef)
OS << "#endif\n";
OS << "\n";
- OS << "#endif // __ARM_NEON_TYPES_H\n";
// Emit struct typedefs.
InIfdef = false;
@@ -2364,29 +2357,7 @@ void NeonEmitter::run(raw_ostream &OS) {
OS << "#include <arm_bf16.h>\n";
- // Emit NEON-specific scalar typedefs.
- OS << "typedef float float32_t;\n";
- OS << "typedef __fp16 float16_t;\n";
-
- OS << "#ifdef __aarch64__\n";
- OS << "typedef double float64_t;\n";
- OS << "#endif\n\n";
-
- // For now, signedness of polynomial types depends on target
- OS << "#ifdef __aarch64__\n";
- OS << "typedef uint8_t poly8_t;\n";
- OS << "typedef uint16_t poly16_t;\n";
- OS << "typedef uint64_t poly64_t;\n";
- OS << "typedef __uint128_t poly128_t;\n";
- OS << "#else\n";
- OS << "typedef int8_t poly8_t;\n";
- OS << "typedef int16_t poly16_t;\n";
- OS << "typedef int64_t poly64_t;\n";
- OS << "#endif\n";
-
- emitNeonTypeDefs("cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQdPcQPcPsQPsPlQPl", OS);
-
- emitNeonTypeDefs("bQb", OS);
+ OS << "#include <arm_vector_types.h>\n";
OS << "#define __ai static __inline__ __attribute__((__always_inline__, "
"__nodebug__))\n\n";
@@ -2568,9 +2539,15 @@ void NeonEmitter::runVectorType(raw_ostream &OS) {
" *===-----------------------------------------------------------------"
"------===\n"
" */\n\n";
- OS << "#ifndef __ARM_NEON_H\n\n";
OS << "#ifndef __ARM_NEON_TYPES_H\n";
OS << "#define __ARM_NEON_TYPES_H\n";
+ OS << "typedef float float32_t;\n";
+ OS << "typedef __fp16 float16_t;\n";
+
+ OS << "#ifdef __aarch64__\n";
+ OS << "typedef double float64_t;\n";
+ OS << "#endif\n\n";
+ // For now, signedness of polynomial types depends on target
OS << "#ifdef __aarch64__\n";
OS << "typedef uint8_t poly8_t;\n";
OS << "typedef uint16_t poly16_t;\n";
@@ -2579,27 +2556,14 @@ void NeonEmitter::runVectorType(raw_ostream &OS) {
OS << "#else\n";
OS << "typedef int8_t poly8_t;\n";
OS << "typedef int16_t poly16_t;\n";
+ OS << "typedef int64_t poly64_t;\n";
OS << "#endif\n";
- // Needs to declare all the types in case there is arm_sve.h followed by
- // arm_neon.h.
- // arm_sve defines __ARM_NEON_TYPES_H so it avoids to declare again the
- // types in arm_neon.h
- std::string TypedefTypes(
- "cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQdPcQPcPsQPsPlQPlbQb");
- std::vector<TypeSpec> TDTypeVec = TypeSpec::fromTypeSpecs(TypedefTypes);
- for (auto &TS : TDTypeVec) {
- Type T(TS, ".");
- OS << "typedef __attribute__((vector_size(";
+ emitNeonTypeDefs("cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQdPcQPcPsQPsPlQPl",
+ OS);
- OS << T.getSizeInBits() / 8 << ")))";
- Type T2 = T;
- T2.makeScalar();
- OS << T2.str();
- OS << " " << T.str() << ";\n";
- }
+ emitNeonTypeDefs("bQb", OS);
OS << "#endif // __ARM_NEON_TYPES_H\n";
- OS << "#endif // __ARM_NEON_H\n";
}
void NeonEmitter::runBF16(raw_ostream &OS) {
diff --git a/clang/utils/TableGen/TableGen.cpp b/clang/utils/TableGen/TableGen.cpp
index 8a183531a61d7d..9a986b532edf6c 100644
--- a/clang/utils/TableGen/TableGen.cpp
+++ b/clang/utils/TableGen/TableGen.cpp
@@ -282,14 +282,11 @@ cl::opt<ActionType> Action(
"Generate riscv_vector_builtin_cg.inc for clang"),
clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
"Generate riscv_vector_builtin_sema.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltins,
- "gen-riscv-sifive-vector-builtins",
+ clEnumValN(GenRISCVSiFiveVectorBuiltins, "gen-riscv-sifive-vector-builtins",
"Generate riscv_sifive_vector_builtins.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinCG,
- "gen-riscv-sifive-vector-builtin-codegen",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinCG, "gen-riscv-sifive-vector-builtin-codegen",
"Generate riscv_sifive_vector_builtin_cg.inc for clang"),
- clEnumValN(GenRISCVSiFiveVectorBuiltinSema,
- "gen-riscv-sifive-vector-builtin-sema",
+ clEnumValN(GenRISCVSiFiveVectorBuiltinSema, "gen-riscv-sifive-vector-builtin-sema",
"Generate riscv_sifive_vector_builtin_sema.inc for clang"),
clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
>From dca5deff43b5f834223b90fd99f7ccbe89b4fe1e Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Thu, 7 Dec 2023 15:58:07 +0000
Subject: [PATCH 5/6] Fix tests fails
---
clang/include/clang/Basic/arm_vector_types.td | 13 --------
clang/lib/Headers/CMakeLists.txt | 2 +-
clang/lib/Sema/SemaType.cpp | 3 +-
clang/utils/TableGen/NeonEmitter.cpp | 31 +++++++++++--------
4 files changed, 21 insertions(+), 28 deletions(-)
delete mode 100644 clang/include/clang/Basic/arm_vector_types.td
diff --git a/clang/include/clang/Basic/arm_vector_types.td b/clang/include/clang/Basic/arm_vector_types.td
deleted file mode 100644
index c4476b0a67bd34..00000000000000
--- a/clang/include/clang/Basic/arm_vector_types.td
+++ /dev/null
@@ -1,13 +0,0 @@
-//===--- arm_vector_types.td - ARM Fixed vector types compiler interface ---===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the TableGen definitions from which the Neon header
-// file will be generated.
-//
-//===----------------------------------------------------------------------===//
-include "arm_neon_incl.td"
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index e199b0752ee376..f8fdd402777e48 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -388,7 +388,7 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
# Generate arm_cde.h
clang_generate_header(-gen-arm-cde-header arm_cde.td arm_cde.h)
# Generate arm_vector_types.h
- clang_generate_header(-gen-arm-vector-type arm_vector_types.td arm_vector_types.h)
+ clang_generate_header(-gen-arm-vector-type arm_neon.td arm_vector_types.h)
# Add headers to target specific lists
list(APPEND arm_common_generated_files
diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp
index 83610503ed9b16..545722a03ef9ac 100644
--- a/clang/lib/Sema/SemaType.cpp
+++ b/clang/lib/Sema/SemaType.cpp
@@ -8360,7 +8360,8 @@ static void HandleNeonVectorTypeAttr(QualType &CurType, const ParsedAttr &Attr,
// not to need a separate attribute)
if (!(S.Context.getTargetInfo().hasFeature("neon") ||
S.Context.getTargetInfo().hasFeature("mve") ||
- IsTargetCUDAAndHostARM)) {
+ IsTargetCUDAAndHostARM) &&
+ VecKind != VectorKind::Neon) {
S.Diag(Attr.getLoc(), diag::err_attribute_unsupported)
<< Attr << "'neon' or 'mve'";
Attr.setInvalid();
diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp
index 4a2de84d47afd7..b58ee10c1d403c 100644
--- a/clang/utils/TableGen/NeonEmitter.cpp
+++ b/clang/utils/TableGen/NeonEmitter.cpp
@@ -2359,6 +2359,19 @@ void NeonEmitter::run(raw_ostream &OS) {
OS << "#include <arm_vector_types.h>\n";
+ // For now, signedness of polynomial types depends on target
+ OS << "#ifdef __aarch64__\n";
+ OS << "typedef uint8_t poly8_t;\n";
+ OS << "typedef uint16_t poly16_t;\n";
+ OS << "typedef uint64_t poly64_t;\n";
+ OS << "typedef __uint128_t poly128_t;\n";
+ OS << "#else\n";
+ OS << "typedef int8_t poly8_t;\n";
+ OS << "typedef int16_t poly16_t;\n";
+ OS << "typedef int64_t poly64_t;\n";
+ OS << "#endif\n";
+ emitNeonTypeDefs("PcQPcPsQPsPlQPl", OS);
+
OS << "#define __ai static __inline__ __attribute__((__always_inline__, "
"__nodebug__))\n\n";
@@ -2539,6 +2552,10 @@ void NeonEmitter::runVectorType(raw_ostream &OS) {
" *===-----------------------------------------------------------------"
"------===\n"
" */\n\n";
+ OS << "#if !defined(__ARM_NEON_H) && !defined(__ARM_SVE_H)\n";
+ OS << "#error \"This file should not be used standalone. Please include"
+ " arm_neon.h or arm_sve.h instead\"\n\n";
+ OS << "#endif\n";
OS << "#ifndef __ARM_NEON_TYPES_H\n";
OS << "#define __ARM_NEON_TYPES_H\n";
OS << "typedef float float32_t;\n";
@@ -2547,20 +2564,8 @@ void NeonEmitter::runVectorType(raw_ostream &OS) {
OS << "#ifdef __aarch64__\n";
OS << "typedef double float64_t;\n";
OS << "#endif\n\n";
- // For now, signedness of polynomial types depends on target
- OS << "#ifdef __aarch64__\n";
- OS << "typedef uint8_t poly8_t;\n";
- OS << "typedef uint16_t poly16_t;\n";
- OS << "typedef uint64_t poly64_t;\n";
- OS << "typedef __uint128_t poly128_t;\n";
- OS << "#else\n";
- OS << "typedef int8_t poly8_t;\n";
- OS << "typedef int16_t poly16_t;\n";
- OS << "typedef int64_t poly64_t;\n";
- OS << "#endif\n";
- emitNeonTypeDefs("cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQdPcQPcPsQPsPlQPl",
- OS);
+ emitNeonTypeDefs("cQcsQsiQilQlUcQUcUsQUsUiQUiUlQUlhQhfQfdQd", OS);
emitNeonTypeDefs("bQb", OS);
OS << "#endif // __ARM_NEON_TYPES_H\n";
>From 8953195dc1d6619fac5110328e547cce0b81be8b Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Fri, 8 Dec 2023 09:58:59 +0000
Subject: [PATCH 6/6] Remove test for neon_vector_type
---
clang/test/Sema/arm-vector-types-support.c | 1 -
clang/test/SemaCUDA/neon-attrs.cu | 3 ---
2 files changed, 4 deletions(-)
diff --git a/clang/test/Sema/arm-vector-types-support.c b/clang/test/Sema/arm-vector-types-support.c
index fa101afa3122ad..b3d23e7d54aa16 100644
--- a/clang/test/Sema/arm-vector-types-support.c
+++ b/clang/test/Sema/arm-vector-types-support.c
@@ -1,5 +1,4 @@
// RUN: %clang_cc1 %s -triple armv7 -fsyntax-only -verify
-typedef __attribute__((neon_vector_type(2))) int int32x2_t; // expected-error{{'neon_vector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
typedef __attribute__((neon_polyvector_type(16))) short poly8x16_t; // expected-error{{'neon_polyvector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
typedef __attribute__((arm_sve_vector_bits(256))) void nosveflag; // expected-error{{'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=}}
diff --git a/clang/test/SemaCUDA/neon-attrs.cu b/clang/test/SemaCUDA/neon-attrs.cu
index a72b03f3bbbd7e..485213144ea08c 100644
--- a/clang/test/SemaCUDA/neon-attrs.cu
+++ b/clang/test/SemaCUDA/neon-attrs.cu
@@ -13,9 +13,6 @@
// Regular C++ compilation on ARM with neon disabled.
// RUN: %clang_cc1 -triple arm64-linux-gnu -target-feature -neon -x c++ -fsyntax-only -verify %s
-// quiet-no-diagnostics
-typedef __attribute__((neon_vector_type(4))) float float32x4_t;
-// expected-error at -1 {{'neon_vector_type' attribute is not supported on targets missing 'neon' or 'mve'}}
typedef unsigned char poly8_t;
typedef __attribute__((neon_polyvector_type(8))) poly8_t poly8x8_t;
// expected-error at -1 {{'neon_polyvector_type' attribute is not supported on targets missing 'neon' or 'mve'}}
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