[clang] [RISCV] Use Float type instead of Half type for Fixed RVV vector type mangling (PR #73091)
Jianjian Guan via cfe-commits
cfe-commits at lists.llvm.org
Tue Nov 21 22:46:15 PST 2023
https://github.com/jacquesguan created https://github.com/llvm/llvm-project/pull/73091
None
>From f785a0a175f509dbc72e11c13eb5eb6f6eaebb43 Mon Sep 17 00:00:00 2001
From: Jianjian GUAN <jacquesguan at me.com>
Date: Wed, 22 Nov 2023 14:34:49 +0800
Subject: [PATCH] [RISCV] Use Float type instead of Half type for Fixed RVV
vector type mangling
---
clang/lib/AST/ItaniumMangle.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/AST/ItaniumMangle.cpp b/clang/lib/AST/ItaniumMangle.cpp
index 2a62ac0175afb72..b1678479888eb77 100644
--- a/clang/lib/AST/ItaniumMangle.cpp
+++ b/clang/lib/AST/ItaniumMangle.cpp
@@ -4029,7 +4029,7 @@ void CXXNameMangler::mangleRISCVFixedRVVVectorType(const VectorType *T) {
case BuiltinType::ULong:
TypeNameOS << "uint64";
break;
- case BuiltinType::Half:
+ case BuiltinType::Float16:
TypeNameOS << "float16";
break;
case BuiltinType::Float:
More information about the cfe-commits
mailing list