[llvm] [lld] [mlir] [clang] [AMDGPU] Change default AMDHSA Code Object version to 5 (PR #73000)

[Joseph Huber via cfe-commits]

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@@ -75,8 +75,8 @@ bb.2:
   store volatile i32 0, ptr addrspace(1) undef
   ret void
 }
-; DEFAULTSIZE: .amdhsa_private_segment_fixed_size 4112
-; DEFAULTSIZE: ; ScratchSize: 4112
+; DEFAULTSIZE: .amdhsa_private_segment_fixed_size 16
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jhuber6 wrote:

My understanding is that it's supposed to be `0` if the backend could not statically determine it, so it's unlikely to be due to that change in COV5. Maybe it's not matching the full line of 16384 or similar?

https://github.com/llvm/llvm-project/pull/73000