[llvm] [clang] [AArch64][SME2] Add ldr_zt, str_zt builtins and intrinsics (PR #71795)

[via cfe-commits]

mikaelholmen wrote:

Hi @MDevereau 
With EXPENSIVE_CHECKS the new testcase fails due to a verifier check:
```
build-all-expensive/bin/llvm-lit -av ../clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
```
results in
```
# After AArch64 Instruction Selection
# Machine code for function test_svldr_zt: IsSSA, TracksLiveness
Frame Objects:
  fi#0: size=8, align=8, at location [SP]
  fi#1: variable sized, align=1, at location [SP]
  fi#2: size=16, align=16, at location [SP]
Function Live Ins: $x0 in %0

bb.0.entry:
  liveins: $x0
  %0:gpr64 = COPY $x0
  ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
  %1:gpr64 = RDSVLI_XI 1
  %2:gpr64 = MADDXrrr %1:gpr64, %1:gpr64, $xzr
  %3:gpr64 = COPY $sp
  %4:gpr64 = SUBSXrr %3:gpr64, killed %2:gpr64, implicit-def dead $nzcv
  $sp = COPY %4:gpr64
  ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
  STRXui %4:gpr64, %stack.2, 0 :: (store (s64) into stack + 2, align 2, basealign 8)
  %5:gpr32 = COPY $wzr
  STRHHui %5:gpr32, %stack.2, 5 :: (store (s16) into stack + 2)
  STRWui %5:gpr32, %stack.2, 3 :: (store (s32) into stack + 2, align 2, basealign 4)
  STRXui %0:gpr64, %stack.0.base.addr, 0 :: (store (s64) into %ir.base.addr)
  %6:gpr64common = LDRXui %stack.0.base.addr, 0 :: (dereferenceable load (s64) from %ir.base.addr)
  LDR_TX_PSEUDO $zt0, killed %6:gpr64common
  RET_ReallyLR

# End machine code for function test_svldr_zt.

*** Bad machine code: Illegal physical register for instruction ***
- function:    test_svldr_zt
- basic block: %bb.0 entry (0x55715bb1e338)
- instruction: LDR_TX_PSEUDO $zt0, killed %6:gpr64common
- operand 0:   $zt0
$zt0 is not a MPR register.
fatal error: error in backend: Found 1 machine code errors.
```
Can also be reproduced with a normal build if you add the verifier explicitly:
```
build-all/bin/clang -cc1 -internal-isystem build-all-expensive/lib/clang/18/include -nostdsysteminc -triple aarch64-none-linux-gnu -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null ../clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c -mllvm -verify-machineinstrs
```


https://github.com/llvm/llvm-project/pull/71795