[clang] Recommit "[Clang][RISCV] Introduce tuple types for RVV bfloat16 #72216" (PR #72370)
Yueh-Ting Chen via cfe-commits
cfe-commits at lists.llvm.org
Wed Nov 15 05:23:51 PST 2023
https://github.com/eopXD updated https://github.com/llvm/llvm-project/pull/72370
>From 78e3ab20f5e527563b7645635b7147fdda8ba4b9 Mon Sep 17 00:00:00 2001
From: "Yueh-Ting (eop) Chen" <yueh.ting.chen at gmail.com>
Date: Wed, 15 Nov 2023 13:50:14 +0800
Subject: [PATCH 1/3] [Clang][RISCV] Introduce tuple types for RVV bfloat16
(#72216)
The first commit extends the capacity from the compiler infrastructure,
and the second commit continues the effort in #71140 to introduce tuple
types for bfloat16.
---
clang/include/clang/Basic/RISCVVTypes.def | 56 +++++++++++++++++++
.../include/clang/Serialization/ASTBitCodes.h | 2 +-
.../clang/Support/RISCVVIntrinsicUtils.h | 5 +-
clang/lib/Support/RISCVVIntrinsicUtils.cpp | 3 +
.../rvv-intrinsic-datatypes.cpp | 55 ++++++++++++++++++
clang/utils/TableGen/RISCVVEmitter.cpp | 4 +-
6 files changed, 121 insertions(+), 4 deletions(-)
diff --git a/clang/include/clang/Basic/RISCVVTypes.def b/clang/include/clang/Basic/RISCVVTypes.def
index af44cdcd53e5bd0..6620de8ad50e01e 100644
--- a/clang/include/clang/Basic/RISCVVTypes.def
+++ b/clang/include/clang/Basic/RISCVVTypes.def
@@ -452,6 +452,62 @@ RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2x4_t", RvvFloat64m2x4, RvvFloat64m2x4Ty, 2
RVV_VECTOR_TYPE_FLOAT("__rvv_float64m4x2_t", RvvFloat64m4x2, RvvFloat64m4x2Ty, 4, 64, 2)
+//===- BFloat16 tuple types -------------------------------------------------===//
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x2_t", RvvBFloat16mf4x2, RvvBFloat16mf4x2Ty,
+ 1, 16, 2)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x3_t", RvvBFloat16mf4x3, RvvBFloat16mf4x3Ty,
+ 1, 16, 3)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x4_t", RvvBFloat16mf4x4, RvvBFloat16mf4x4Ty,
+ 1, 16, 4)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x5_t", RvvBFloat16mf4x5, RvvBFloat16mf4x5Ty,
+ 1, 16, 5)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x6_t", RvvBFloat16mf4x6, RvvBFloat16mf4x6Ty,
+ 1, 16, 6)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x7_t", RvvBFloat16mf4x7, RvvBFloat16mf4x7Ty,
+ 1, 16, 7)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x8_t", RvvBFloat16mf4x8, RvvBFloat16mf4x8Ty,
+ 1, 16, 8)
+
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x2_t", RvvBFloat16mf2x2, RvvBFloat16mf2x2Ty,
+ 2, 16, 2)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x3_t", RvvBFloat16mf2x3, RvvBFloat16mf2x3Ty,
+ 2, 16, 3)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x4_t", RvvBFloat16mf2x4, RvvBFloat16mf2x4Ty,
+ 2, 16, 4)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x5_t", RvvBFloat16mf2x5, RvvBFloat16mf2x5Ty,
+ 2, 16, 5)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x6_t", RvvBFloat16mf2x6, RvvBFloat16mf2x6Ty,
+ 2, 16, 6)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x7_t", RvvBFloat16mf2x7, RvvBFloat16mf2x7Ty,
+ 2, 16, 7)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x8_t", RvvBFloat16mf2x8, RvvBFloat16mf2x8Ty,
+ 2, 16, 8)
+
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x2_t", RvvBFloat16m1x2, RvvBFloat16m1x2Ty,
+ 4, 16, 2)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x3_t", RvvBFloat16m1x3, RvvBFloat16m1x3Ty,
+ 4, 16, 3)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x4_t", RvvBFloat16m1x4, RvvBFloat16m1x4Ty,
+ 4, 16, 4)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x5_t", RvvBFloat16m1x5, RvvBFloat16m1x5Ty,
+ 4, 16, 5)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x6_t", RvvBFloat16m1x6, RvvBFloat16m1x6Ty,
+ 4, 16, 6)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x7_t", RvvBFloat16m1x7, RvvBFloat16m1x7Ty,
+ 4, 16, 7)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x8_t", RvvBFloat16m1x8, RvvBFloat16m1x8Ty,
+ 4, 16, 8)
+
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x2_t", RvvBFloat16m2x2, RvvBFloat16m2x2Ty,
+ 8, 16, 2)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x3_t", RvvBFloat16m2x3, RvvBFloat16m2x3Ty,
+ 8, 16, 3)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x4_t", RvvBFloat16m2x4, RvvBFloat16m2x4Ty,
+ 8, 16, 4)
+
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m4x2_t", RvvBFloat16m4x2, RvvBFloat16m4x2Ty,
+ 16, 16, 2)
+
#undef RVV_VECTOR_TYPE_BFLOAT
#undef RVV_VECTOR_TYPE_FLOAT
#undef RVV_VECTOR_TYPE_INT
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h b/clang/include/clang/Serialization/ASTBitCodes.h
index 5c32fbc079c9a65..9044c46fc671963 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1101,7 +1101,7 @@ enum PredefinedTypeIDs {
///
/// Type IDs for non-predefined types will start at
/// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 500;
+const unsigned NUM_PREDEF_TYPE_IDS = 600;
// Ensure we do not overrun the predefined types we reserved
// in the enum PredefinedTypeIDs above.
diff --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
index cd620a8fb2b5c14..49ce32553da81eb 100644
--- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -97,13 +97,14 @@ enum class TypeModifier : uint8_t {
UnsignedInteger = 1 << 3,
SignedInteger = 1 << 4,
Float = 1 << 5,
+ BFloat = 1 << 6,
// LMUL1 should be kind of VectorTypeModifier, but that might come with
// Widening2XVector for widening reduction.
// However that might require VectorTypeModifier become bitmask rather than
// simple enum, so we decide keek LMUL1 in TypeModifier for code size
// optimization of clang binary size.
- LMUL1 = 1 << 6,
- MaxOffset = 6,
+ LMUL1 = 1 << 7,
+ MaxOffset = 7,
LLVM_MARK_AS_BITMASK_ENUM(LMUL1),
};
diff --git a/clang/lib/Support/RISCVVIntrinsicUtils.cpp b/clang/lib/Support/RISCVVIntrinsicUtils.cpp
index 78d49f15732a11e..a04694e628de404 100644
--- a/clang/lib/Support/RISCVVIntrinsicUtils.cpp
+++ b/clang/lib/Support/RISCVVIntrinsicUtils.cpp
@@ -857,6 +857,9 @@ void RVVType::applyModifier(const PrototypeDescriptor &Transformer) {
case TypeModifier::Float:
ScalarType = ScalarTypeKind::Float;
break;
+ case TypeModifier::BFloat:
+ ScalarType = ScalarTypeKind::BFloat;
+ break;
case TypeModifier::LMUL1:
LMUL = LMULType(0);
// Update ElementBitwidth need to update Scale too.
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
index 054d09e7853c393..30725c4d479f236 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
@@ -305,6 +305,31 @@
// CHECK-NEXT: [[F64M2X3:%.*]] = alloca { <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double> }, align 8
// CHECK-NEXT: [[F64M2X4:%.*]] = alloca { <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double> }, align 8
// CHECK-NEXT: [[F64M4X2:%.*]] = alloca { <vscale x 4 x double>, <vscale x 4 x double> }, align 8
+// CHECK-NEXT: [[BF16MF4X2:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X3:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X4:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X5:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X6:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X7:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF4X8:%.*]] = alloca { <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat>, <vscale x 1 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X2:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X3:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X4:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X5:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X6:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X7:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16MF2X8:%.*]] = alloca { <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X2:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X3:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X4:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X5:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X6:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X7:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M1X8:%.*]] = alloca { <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat>, <vscale x 4 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M2X2:%.*]] = alloca { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M2X3:%.*]] = alloca { <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M2X4:%.*]] = alloca { <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat> }, align 2
+// CHECK-NEXT: [[BF16M4X2:%.*]] = alloca { <vscale x 16 x bfloat>, <vscale x 16 x bfloat> }, align 2
// CHECK-NEXT: ret void
//
void foo () {
@@ -664,4 +689,34 @@ void foo () {
vfloat64m2x4_t f64m2x4;
vfloat64m4x2_t f64m4x2;
+ // bf16
+ vbfloat16mf4x2_t bf16mf4x2;
+ vbfloat16mf4x3_t bf16mf4x3;
+ vbfloat16mf4x4_t bf16mf4x4;
+ vbfloat16mf4x5_t bf16mf4x5;
+ vbfloat16mf4x6_t bf16mf4x6;
+ vbfloat16mf4x7_t bf16mf4x7;
+ vbfloat16mf4x8_t bf16mf4x8;
+
+ vbfloat16mf2x2_t bf16mf2x2;
+ vbfloat16mf2x3_t bf16mf2x3;
+ vbfloat16mf2x4_t bf16mf2x4;
+ vbfloat16mf2x5_t bf16mf2x5;
+ vbfloat16mf2x6_t bf16mf2x6;
+ vbfloat16mf2x7_t bf16mf2x7;
+ vbfloat16mf2x8_t bf16mf2x8;
+
+ vbfloat16m1x2_t bf16m1x2;
+ vbfloat16m1x3_t bf16m1x3;
+ vbfloat16m1x4_t bf16m1x4;
+ vbfloat16m1x5_t bf16m1x5;
+ vbfloat16m1x6_t bf16m1x6;
+ vbfloat16m1x7_t bf16m1x7;
+ vbfloat16m1x8_t bf16m1x8;
+
+ vbfloat16m2x2_t bf16m2x2;
+ vbfloat16m2x3_t bf16m2x3;
+ vbfloat16m2x4_t bf16m2x4;
+
+ vbfloat16m4x2_t bf16m4x2;
}
diff --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp
index 95b80e07e836e52..cf731e8414a3b83 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -401,7 +401,9 @@ void RVVEmitter::createHeader(raw_ostream &OS) {
auto TupleT = TypeCache.computeType(
BT, Log2LMUL,
PrototypeDescriptor(BaseTypeModifier::Vector, getTupleVTM(NF),
- TypeModifier::Float));
+ (BT == BasicType::BFloat16
+ ? TypeModifier::BFloat
+ : TypeModifier::Float)));
if (TupleT)
printType(*TupleT);
}
>From a201ec6faae8f006ae8754cd3a05ca7a93787b7d Mon Sep 17 00:00:00 2001
From: eopXD <yueh.ting.chen at gmail.com>
Date: Wed, 15 Nov 2023 02:18:22 -0800
Subject: [PATCH 2/3] [Clang][Type] Reduce cap of TypeID from 600 to 502
---
clang/include/clang/Serialization/ASTBitCodes.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h b/clang/include/clang/Serialization/ASTBitCodes.h
index 9044c46fc671963..fdd64f2abbe9375 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1101,7 +1101,7 @@ enum PredefinedTypeIDs {
///
/// Type IDs for non-predefined types will start at
/// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 600;
+const unsigned NUM_PREDEF_TYPE_IDS = 502;
// Ensure we do not overrun the predefined types we reserved
// in the enum PredefinedTypeIDs above.
>From c0f5777ceb26a65584999e66f14387b625d12312 Mon Sep 17 00:00:00 2001
From: eopXD <yueh.ting.chen at gmail.com>
Date: Wed, 15 Nov 2023 05:22:43 -0800
Subject: [PATCH 3/3] [Clang][Type] Update result for test case
Increment in numbers of predefined TypeID affects the test case.
Also added notes so others can triage the test case failure faster in
the future.
---
clang/test/Modules/decl-params-determinisim.m | 21 ++++++++++++-------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/clang/test/Modules/decl-params-determinisim.m b/clang/test/Modules/decl-params-determinisim.m
index 9eedf0a206423b2..ccad40b98d8edf4 100644
--- a/clang/test/Modules/decl-params-determinisim.m
+++ b/clang/test/Modules/decl-params-determinisim.m
@@ -20,25 +20,30 @@
/// Spot check entries to make sure they are in current ordering.
/// op13 encodes the anonymous decl number which should be in order.
+
+/// NOTE: This test case is on determinism of TypeID for function declaration.
+/// Change related to TypeID (or PredefinedTypeIDs) will affect the result and
+/// will require update for this test case.
+
// CHECK: <TYPE_FUNCTION_PROTO
// CHECK-NEXT: <DECL_PARM_VAR
-// CHECK-SAME: op11=4024
-// CHECK-NEXT: <DECL_PARM_VAR
-// CHECK-SAME: op11=4032
-// CHECK-NEXT: <DECL_PARM_VAR
// CHECK-SAME: op11=4040
// CHECK-NEXT: <DECL_PARM_VAR
// CHECK-SAME: op11=4048
+// CHECK-NEXT: <DECL_PARM_VAR
+// CHECK-SAME: op11=4056
+// CHECK-NEXT: <DECL_PARM_VAR
+// CHECK-SAME: op11=4064
/// Decl records start at 43
// CHECK: <DECL_RECORD
-// CHECK-SAME: op9=4352
-// CHECK-NEXT: <DECL_RECORD
-// CHECK-SAME: op9=4360
-// CHECK-NEXT: <DECL_RECORD
// CHECK-SAME: op9=4368
// CHECK-NEXT: <DECL_RECORD
// CHECK-SAME: op9=4376
+// CHECK-NEXT: <DECL_RECORD
+// CHECK-SAME: op9=4384
+// CHECK-NEXT: <DECL_RECORD
+// CHECK-SAME: op9=4392
//--- headers/a.h
void f(struct A0 *a0,
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