[clang] [llvm] [AArch64][SVE2.1] Add intrinsics for quadword loads/stores with unscaled offset (PR #70474)
David Sherwood via cfe-commits
cfe-commits at lists.llvm.org
Fri Nov 3 07:31:38 PDT 2023
================
@@ -9702,17 +9727,34 @@ Value *CodeGenFunction::EmitSVEMaskedStore(const CallExpr *E,
auto VectorTy = cast<llvm::ScalableVectorType>(Ops.back()->getType());
auto MemoryTy = llvm::ScalableVectorType::get(MemEltTy, VectorTy);
- Value *Predicate = EmitSVEPredicateCast(Ops[0], MemoryTy);
+ auto PredTy = MemoryTy;
+ auto AddrMemoryTy = MemoryTy;
+ bool IsTruncatingStore = true;
----------------
david-arm wrote:
Same comment as in EmitSVEMaskedLoad. Perhaps better just to have a IsQuadStore boolean, since it's an exceptional case and unlikely to have commonality with other instructions?
https://github.com/llvm/llvm-project/pull/70474
More information about the cfe-commits
mailing list