[llvm] [clang] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)
Jon Roelofs via cfe-commits
cfe-commits at lists.llvm.org
Wed Nov 1 13:52:46 PDT 2023
================
@@ -1306,6 +1306,12 @@ bool AArch64TargetInfo::validateAsmConstraint(
Name += 2;
return true;
}
+ if (Name[1] == 'c' && (Name[2] == 'i' || Name[2] == 'j')) {
+ // Gpr registers ("Uci"=w8-11, "Upj"=w12-15)
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jroelofs wrote:
`s/Upj/Ucj/` ?
https://github.com/llvm/llvm-project/pull/70970
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