[clang] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)

[Alex Bradbury via cfe-commits]

asb wrote:

> > @dtcxzyw Could you please confirm the status of this core - is it commercially available, an academic test chip, something else?
> 
> It's maintained by Beijing Institute of Open Source Chip (BOSC), a non-profit organziation founded by companies and researech institutions. It is provided as an open-source CPU Core IP to the third party. It's not an academic testchip.
> 
> It's not commercially available now, but there have already been a couple of companies using it as the CPU Core IP. I cannot disclose the progress of commercial chips now but hopefully we will see it soon. There are also some companies using it on FPGAs now.

Thanks for clarifying. We don't really have an established policy here - it's obvious that commercial designs with active support should go in, and that some core design I hacked up over a weekend shouldn't but we haven't had the need to discuss anything in-between that. This patch and the scheduling model aren't large, but if there's thought of adding substantially more specific tuning it might be worth discussing those plans.

All that said, @dtcxzyw this is obviously far from your first patch so I have no concern about support being maintained. @preames suggested that we might want to think about deprecation policy so that we can be fairly liberal in accepting support for new CPUs/microarchs, yet remove them later if they become less relevant. Before you go ahead with the merge, it would be good to confirm that @preames agrees that this patch doesn't need to block on discussing that deprecation policy.

Thanks!

https://github.com/llvm/llvm-project/pull/70294