[clang] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)

Wang Pengcheng via cfe-commits cfe-commits at lists.llvm.org
Thu Oct 26 02:36:05 PDT 2023


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@@ -20,6 +20,17 @@
 // MCPU-SYNTACORE-SCR1-MAX: "-target-feature" "+zicsr" "-target-feature" "+zifencei"
 // MCPU-SYNTACORE-SCR1-MAX: "-target-abi" "ilp32"
 
+// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mcpu=xiangshan-nanhu | FileCheck -check-prefix=MCPU-XIANGSHAN-NANHU %s
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wangpc-pp wrote:

I prefer to one CHECK line for one feature, but it's OK since other processors aren't in this form. 

https://github.com/llvm/llvm-project/pull/70294


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