[PATCH] D151433: [Clang][SVE2.1] Add builtins for Multi-vector load and store

[Kerry McLaughlin via Phabricator via cfe-commits]

kmclaughlin added inline comments.


================
Comment at: clang/include/clang/Basic/arm_sve.td:1920
+
+def SVST1B_X2 : MInst<"svst1[_{2}_x2]", "v}p2", "cUc", [IsStructStore,], MemEltTyDefault, "aarch64_sve_st1_pn_x2">;
+def SVST1H_X2 : MInst<"svst1[_{2}_x2]", "v}p2", "sUshb", [IsStructStore,], MemEltTyDefault, "aarch64_sve_st1_pn_x2">;
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Please can you remove the extra comma from these lists?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151433/new/

https://reviews.llvm.org/D151433