[clang] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)

[Felix via cfe-commits]

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@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
          "GETtls[ld]ADDR[32] must read GPR3");
 
   if (Subtarget->isAIXABI()) {
-    // On AIX, the variable offset should already be in R4 and the region handle
-    // should already be in R3.
-    // For TLSGD, which currently is the only supported access model, we only
-    // need to generate an absolute branch to .__tls_get_addr.
+    // For TLSGD, the variable offset should already be in R4 and the region
+    // handle should already be in R3. We generate an absolute branch to
+    // .__tls_get_addr. For TLSLD, the module handle should already be in R3.
+    // We generate an absolute branch to .__tls_get_mod.
     Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
     (void)VarOffsetReg;
-    assert(MI->getOperand(2).isReg() &&
-           MI->getOperand(2).getReg() == VarOffsetReg &&
+    assert((MI->getOpcode() == PPC::GETtlsMOD32AIX ||
+            MI->getOpcode() == PPC::GETtlsMOD64AIX ||
+            (MI->getOperand(2).isReg() &&
+             MI->getOperand(2).getReg() == VarOffsetReg)) &&
            "GETtls[ld]ADDR[32] must read GPR4");
     EmitAIXTlsCallHelper(MI);
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orcguru wrote:

Thank you for looking into this!

I tried the example, and it seems turn on optimization can help remove the FP load. We declared "Defs = [X0,X4,X5,X11,LR8,CR0]" for GETtlsMOD64AIX, and "Defs = [R0,R4,R5,R11,LR,CR0]" for GETtlsMOD32AIX. I think those FP registers should be treated as not touched by the call to __tls_get_mod.

https://github.com/llvm/llvm-project/pull/66316