[PATCH] D145214: [TSAN] add support for riscv64

[Jessica Clarke via Phabricator via cfe-commits]

jrtc27 added inline comments.


================
Comment at: compiler-rt/lib/tsan/rtl/CMakeLists.txt:5
 append_list_if(COMPILER_RT_HAS_MSSE4_2_FLAG -msse4.2 TSAN_RTL_CFLAGS)
-append_list_if(SANITIZER_LIMIT_FRAME_SIZE -Wframe-larger-than=530
+append_list_if(SANITIZER_LIMIT_FRAME_SIZE -Wframe-larger-than=656
                TSAN_RTL_CFLAGS)
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hiraditya wrote:
> dvyukov wrote:
> > vitalybuka wrote:
> > > Maybe this one is not needed after b31bd6d8046d01a66aa92993bacb56b115a67fc5
> > Yes, is this needed? What function does have larger frame?
> > If we increase the limit, other arches will slowly slinetly degrade too.
> yeah probably not needed anymore. but if we need this we can just change this only for RISC-V?
I would rather diagnose and fix whatever makes RISC-V code generation less efficient


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145214/new/

https://reviews.llvm.org/D145214