[clang] ccd5b8d - [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2 (#67410)
via cfe-commits
cfe-commits at lists.llvm.org
Wed Sep 27 06:24:27 PDT 2023
Author: Freddy Ye
Date: 2023-09-27T21:24:22+08:00
New Revision: ccd5b8db48a4cfa9e6868301cbab5fe033434e46
URL: https://github.com/llvm/llvm-project/commit/ccd5b8db48a4cfa9e6868301cbab5fe033434e46
DIFF: https://github.com/llvm/llvm-project/commit/ccd5b8db48a4cfa9e6868301cbab5fe033434e46.diff
LOG: [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2 (#67410)
Added:
clang/test/CodeGen/X86/cmp-avx-builtins-error.c
Modified:
clang/include/clang/Basic/BuiltinsX86.def
clang/lib/Headers/avxintrin.h
clang/lib/Headers/emmintrin.h
clang/lib/Headers/xmmintrin.h
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/X86/avx-builtins.c
clang/test/CodeGen/X86/sse-builtins.c
clang/test/CodeGen/X86/sse2-builtins.c
clang/test/CodeGen/target-features-error-2.c
clang/test/Sema/builtins-x86.c
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def
index e4802f8ab1c1562..6bbbc4bbdd75c68 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -233,6 +233,8 @@ TARGET_BUILTIN(__builtin_ia32_minps, "V4fV4fV4f", "ncV:128:", "sse")
TARGET_BUILTIN(__builtin_ia32_maxps, "V4fV4fV4f", "ncV:128:", "sse")
TARGET_BUILTIN(__builtin_ia32_minss, "V4fV4fV4f", "ncV:128:", "sse")
TARGET_BUILTIN(__builtin_ia32_maxss, "V4fV4fV4f", "ncV:128:", "sse")
+TARGET_BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fIc", "ncV:128:", "sse")
+TARGET_BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fIc", "ncV:128:", "sse")
TARGET_BUILTIN(__builtin_ia32_cmpeqpd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_cmpltpd, "V2dV2dV2d", "ncV:128:", "sse2")
@@ -250,6 +252,8 @@ TARGET_BUILTIN(__builtin_ia32_cmpneqsd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_cmpnltsd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_cmpnlesd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_cmpordsd, "V2dV2dV2d", "ncV:128:", "sse2")
+TARGET_BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dIc", "ncV:128:", "sse2")
+TARGET_BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dIc", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_minpd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_maxpd, "V2dV2dV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_minsd, "V2dV2dV2d", "ncV:128:", "sse2")
@@ -469,12 +473,8 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256, "V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fIc", "ncV:256:", "avx")
-TARGET_BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dIc", "ncV:128:", "avx")
TARGET_BUILTIN(__builtin_ia32_cmppd256, "V4dV4dV4dIc", "ncV:256:", "avx")
-TARGET_BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fIc", "ncV:128:", "avx")
TARGET_BUILTIN(__builtin_ia32_cmpps256, "V8fV8fV8fIc", "ncV:256:", "avx")
-TARGET_BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dIc", "ncV:128:", "avx")
-TARGET_BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fIc", "ncV:128:", "avx")
TARGET_BUILTIN(__builtin_ia32_vextractf128_pd256, "V2dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_vextractf128_ps256, "V4fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_vextractf128_si256, "V4iV8iIi", "ncV:256:", "avx")
diff --git a/clang/lib/Headers/avxintrin.h b/clang/lib/Headers/avxintrin.h
index b796bb773ec11f0..9729786923c2d59 100644
--- a/clang/lib/Headers/avxintrin.h
+++ b/clang/lib/Headers/avxintrin.h
@@ -1569,15 +1569,6 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)
((__m256d)__builtin_ia32_shufpd256((__v4df)(__m256d)(a), \
(__v4df)(__m256d)(b), (int)(mask)))
-/* Compare */
-#define _CMP_EQ_OQ 0x00 /* Equal (ordered, non-signaling) */
-#define _CMP_LT_OS 0x01 /* Less-than (ordered, signaling) */
-#define _CMP_LE_OS 0x02 /* Less-than-or-equal (ordered, signaling) */
-#define _CMP_UNORD_Q 0x03 /* Unordered (non-signaling) */
-#define _CMP_NEQ_UQ 0x04 /* Not-equal (unordered, non-signaling) */
-#define _CMP_NLT_US 0x05 /* Not-less-than (unordered, signaling) */
-#define _CMP_NLE_US 0x06 /* Not-less-than-or-equal (unordered, signaling) */
-#define _CMP_ORD_Q 0x07 /* Ordered (non-signaling) */
#define _CMP_EQ_UQ 0x08 /* Equal (unordered, non-signaling) */
#define _CMP_NGE_US 0x09 /* Not-greater-than-or-equal (unordered, signaling) */
#define _CMP_NGT_US 0x0a /* Not-greater-than (unordered, signaling) */
@@ -1603,126 +1594,6 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)
#define _CMP_GT_OQ 0x1e /* Greater-than (ordered, non-signaling) */
#define _CMP_TRUE_US 0x1f /* True (unordered, signaling) */
-/// Compares each of the corresponding double-precision values of two
-/// 128-bit vectors of [2 x double], using the operation specified by the
-/// immediate integer operand.
-///
-/// Returns a [2 x double] vector consisting of two doubles corresponding to
-/// the two comparison results: zero if the comparison is false, and all 1's
-/// if the comparison is true.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCMPPD </c> instruction.
-///
-/// \param a
-/// A 128-bit vector of [2 x double].
-/// \param b
-/// A 128-bit vector of [2 x double].
-/// \param c
-/// An immediate integer operand, with bits [4:0] specifying which comparison
-/// operation to use: \n
-/// 0x00: Equal (ordered, non-signaling) \n
-/// 0x01: Less-than (ordered, signaling) \n
-/// 0x02: Less-than-or-equal (ordered, signaling) \n
-/// 0x03: Unordered (non-signaling) \n
-/// 0x04: Not-equal (unordered, non-signaling) \n
-/// 0x05: Not-less-than (unordered, signaling) \n
-/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
-/// 0x07: Ordered (non-signaling) \n
-/// 0x08: Equal (unordered, non-signaling) \n
-/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
-/// 0x0A: Not-greater-than (unordered, signaling) \n
-/// 0x0B: False (ordered, non-signaling) \n
-/// 0x0C: Not-equal (ordered, non-signaling) \n
-/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
-/// 0x0E: Greater-than (ordered, signaling) \n
-/// 0x0F: True (unordered, non-signaling) \n
-/// 0x10: Equal (ordered, signaling) \n
-/// 0x11: Less-than (ordered, non-signaling) \n
-/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
-/// 0x13: Unordered (signaling) \n
-/// 0x14: Not-equal (unordered, signaling) \n
-/// 0x15: Not-less-than (unordered, non-signaling) \n
-/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
-/// 0x17: Ordered (signaling) \n
-/// 0x18: Equal (unordered, signaling) \n
-/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
-/// 0x1A: Not-greater-than (unordered, non-signaling) \n
-/// 0x1B: False (ordered, signaling) \n
-/// 0x1C: Not-equal (ordered, signaling) \n
-/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
-/// 0x1E: Greater-than (ordered, non-signaling) \n
-/// 0x1F: True (unordered, signaling)
-/// \returns A 128-bit vector of [2 x double] containing the comparison results.
-#define _mm_cmp_pd(a, b, c) \
- ((__m128d)__builtin_ia32_cmppd((__v2df)(__m128d)(a), \
- (__v2df)(__m128d)(b), (c)))
-
-/// Compares each of the corresponding values of two 128-bit vectors of
-/// [4 x float], using the operation specified by the immediate integer
-/// operand.
-///
-/// Returns a [4 x float] vector consisting of four floats corresponding to
-/// the four comparison results: zero if the comparison is false, and all 1's
-/// if the comparison is true.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCMPPS </c> instruction.
-///
-/// \param a
-/// A 128-bit vector of [4 x float].
-/// \param b
-/// A 128-bit vector of [4 x float].
-/// \param c
-/// An immediate integer operand, with bits [4:0] specifying which comparison
-/// operation to use: \n
-/// 0x00: Equal (ordered, non-signaling) \n
-/// 0x01: Less-than (ordered, signaling) \n
-/// 0x02: Less-than-or-equal (ordered, signaling) \n
-/// 0x03: Unordered (non-signaling) \n
-/// 0x04: Not-equal (unordered, non-signaling) \n
-/// 0x05: Not-less-than (unordered, signaling) \n
-/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
-/// 0x07: Ordered (non-signaling) \n
-/// 0x08: Equal (unordered, non-signaling) \n
-/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
-/// 0x0A: Not-greater-than (unordered, signaling) \n
-/// 0x0B: False (ordered, non-signaling) \n
-/// 0x0C: Not-equal (ordered, non-signaling) \n
-/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
-/// 0x0E: Greater-than (ordered, signaling) \n
-/// 0x0F: True (unordered, non-signaling) \n
-/// 0x10: Equal (ordered, signaling) \n
-/// 0x11: Less-than (ordered, non-signaling) \n
-/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
-/// 0x13: Unordered (signaling) \n
-/// 0x14: Not-equal (unordered, signaling) \n
-/// 0x15: Not-less-than (unordered, non-signaling) \n
-/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
-/// 0x17: Ordered (signaling) \n
-/// 0x18: Equal (unordered, signaling) \n
-/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
-/// 0x1A: Not-greater-than (unordered, non-signaling) \n
-/// 0x1B: False (ordered, signaling) \n
-/// 0x1C: Not-equal (ordered, signaling) \n
-/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
-/// 0x1E: Greater-than (ordered, non-signaling) \n
-/// 0x1F: True (unordered, signaling)
-/// \returns A 128-bit vector of [4 x float] containing the comparison results.
-#define _mm_cmp_ps(a, b, c) \
- ((__m128)__builtin_ia32_cmpps((__v4sf)(__m128)(a), \
- (__v4sf)(__m128)(b), (c)))
-
/// Compares each of the corresponding double-precision values of two
/// 256-bit vectors of [4 x double], using the operation specified by the
/// immediate integer operand.
@@ -1843,124 +1714,6 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)
((__m256)__builtin_ia32_cmpps256((__v8sf)(__m256)(a), \
(__v8sf)(__m256)(b), (c)))
-/// Compares each of the corresponding scalar double-precision values of
-/// two 128-bit vectors of [2 x double], using the operation specified by the
-/// immediate integer operand.
-///
-/// If the result is true, all 64 bits of the destination vector are set;
-/// otherwise they are cleared.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCMPSD </c> instruction.
-///
-/// \param a
-/// A 128-bit vector of [2 x double].
-/// \param b
-/// A 128-bit vector of [2 x double].
-/// \param c
-/// An immediate integer operand, with bits [4:0] specifying which comparison
-/// operation to use: \n
-/// 0x00: Equal (ordered, non-signaling) \n
-/// 0x01: Less-than (ordered, signaling) \n
-/// 0x02: Less-than-or-equal (ordered, signaling) \n
-/// 0x03: Unordered (non-signaling) \n
-/// 0x04: Not-equal (unordered, non-signaling) \n
-/// 0x05: Not-less-than (unordered, signaling) \n
-/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
-/// 0x07: Ordered (non-signaling) \n
-/// 0x08: Equal (unordered, non-signaling) \n
-/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
-/// 0x0A: Not-greater-than (unordered, signaling) \n
-/// 0x0B: False (ordered, non-signaling) \n
-/// 0x0C: Not-equal (ordered, non-signaling) \n
-/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
-/// 0x0E: Greater-than (ordered, signaling) \n
-/// 0x0F: True (unordered, non-signaling) \n
-/// 0x10: Equal (ordered, signaling) \n
-/// 0x11: Less-than (ordered, non-signaling) \n
-/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
-/// 0x13: Unordered (signaling) \n
-/// 0x14: Not-equal (unordered, signaling) \n
-/// 0x15: Not-less-than (unordered, non-signaling) \n
-/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
-/// 0x17: Ordered (signaling) \n
-/// 0x18: Equal (unordered, signaling) \n
-/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
-/// 0x1A: Not-greater-than (unordered, non-signaling) \n
-/// 0x1B: False (ordered, signaling) \n
-/// 0x1C: Not-equal (ordered, signaling) \n
-/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
-/// 0x1E: Greater-than (ordered, non-signaling) \n
-/// 0x1F: True (unordered, signaling)
-/// \returns A 128-bit vector of [2 x double] containing the comparison results.
-#define _mm_cmp_sd(a, b, c) \
- ((__m128d)__builtin_ia32_cmpsd((__v2df)(__m128d)(a), \
- (__v2df)(__m128d)(b), (c)))
-
-/// Compares each of the corresponding scalar values of two 128-bit
-/// vectors of [4 x float], using the operation specified by the immediate
-/// integer operand.
-///
-/// If the result is true, all 32 bits of the destination vector are set;
-/// otherwise they are cleared.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCMPSS </c> instruction.
-///
-/// \param a
-/// A 128-bit vector of [4 x float].
-/// \param b
-/// A 128-bit vector of [4 x float].
-/// \param c
-/// An immediate integer operand, with bits [4:0] specifying which comparison
-/// operation to use: \n
-/// 0x00: Equal (ordered, non-signaling) \n
-/// 0x01: Less-than (ordered, signaling) \n
-/// 0x02: Less-than-or-equal (ordered, signaling) \n
-/// 0x03: Unordered (non-signaling) \n
-/// 0x04: Not-equal (unordered, non-signaling) \n
-/// 0x05: Not-less-than (unordered, signaling) \n
-/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
-/// 0x07: Ordered (non-signaling) \n
-/// 0x08: Equal (unordered, non-signaling) \n
-/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
-/// 0x0A: Not-greater-than (unordered, signaling) \n
-/// 0x0B: False (ordered, non-signaling) \n
-/// 0x0C: Not-equal (ordered, non-signaling) \n
-/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
-/// 0x0E: Greater-than (ordered, signaling) \n
-/// 0x0F: True (unordered, non-signaling) \n
-/// 0x10: Equal (ordered, signaling) \n
-/// 0x11: Less-than (ordered, non-signaling) \n
-/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
-/// 0x13: Unordered (signaling) \n
-/// 0x14: Not-equal (unordered, signaling) \n
-/// 0x15: Not-less-than (unordered, non-signaling) \n
-/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
-/// 0x17: Ordered (signaling) \n
-/// 0x18: Equal (unordered, signaling) \n
-/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
-/// 0x1A: Not-greater-than (unordered, non-signaling) \n
-/// 0x1B: False (ordered, signaling) \n
-/// 0x1C: Not-equal (ordered, signaling) \n
-/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
-/// 0x1E: Greater-than (ordered, non-signaling) \n
-/// 0x1F: True (unordered, signaling)
-/// \returns A 128-bit vector of [4 x float] containing the comparison results.
-#define _mm_cmp_ss(a, b, c) \
- ((__m128)__builtin_ia32_cmpss((__v4sf)(__m128)(a), \
- (__v4sf)(__m128)(b), (c)))
-
/// Takes a [8 x i32] vector and returns the vector element value
/// indexed by the immediate constant operand.
///
diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h
index 8de2864b110653f..20cd1d4d732fcac 100644
--- a/clang/lib/Headers/emmintrin.h
+++ b/clang/lib/Headers/emmintrin.h
@@ -4742,6 +4742,127 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) {
return (__m128d)__a;
}
+/// Compares each of the corresponding double-precision values of two
+/// 128-bit vectors of [2 x double], using the operation specified by the
+/// immediate integer operand.
+///
+/// Returns a [2 x double] vector consisting of two doubles corresponding to
+/// the two comparison results: zero if the comparison is false, and all 1's
+/// if the comparison is true.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> (V)CMPPD </c> instruction.
+///
+/// \param a
+/// A 128-bit vector of [2 x double].
+/// \param b
+/// A 128-bit vector of [2 x double].
+/// \param c
+/// An immediate integer operand, with bits [4:0] specifying which comparison
+/// operation to use: \n
+/// (Note that without avx enabled, only bits [2:0] are supported) \n
+/// 0x00: Equal (ordered, non-signaling) \n
+/// 0x01: Less-than (ordered, signaling) \n
+/// 0x02: Less-than-or-equal (ordered, signaling) \n
+/// 0x03: Unordered (non-signaling) \n
+/// 0x04: Not-equal (unordered, non-signaling) \n
+/// 0x05: Not-less-than (unordered, signaling) \n
+/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
+/// 0x07: Ordered (non-signaling) \n
+/// 0x08: Equal (unordered, non-signaling) \n
+/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
+/// 0x0A: Not-greater-than (unordered, signaling) \n
+/// 0x0B: False (ordered, non-signaling) \n
+/// 0x0C: Not-equal (ordered, non-signaling) \n
+/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
+/// 0x0E: Greater-than (ordered, signaling) \n
+/// 0x0F: True (unordered, non-signaling) \n
+/// 0x10: Equal (ordered, signaling) \n
+/// 0x11: Less-than (ordered, non-signaling) \n
+/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
+/// 0x13: Unordered (signaling) \n
+/// 0x14: Not-equal (unordered, signaling) \n
+/// 0x15: Not-less-than (unordered, non-signaling) \n
+/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
+/// 0x17: Ordered (signaling) \n
+/// 0x18: Equal (unordered, signaling) \n
+/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
+/// 0x1A: Not-greater-than (unordered, non-signaling) \n
+/// 0x1B: False (ordered, signaling) \n
+/// 0x1C: Not-equal (ordered, signaling) \n
+/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
+/// 0x1E: Greater-than (ordered, non-signaling) \n
+/// 0x1F: True (unordered, signaling)
+/// \returns A 128-bit vector of [2 x double] containing the comparison results.
+#define _mm_cmp_pd(a, b, c) \
+ ((__m128d)__builtin_ia32_cmppd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
+ (c)))
+
+/// Compares each of the corresponding scalar double-precision values of
+/// two 128-bit vectors of [2 x double], using the operation specified by the
+/// immediate integer operand.
+///
+/// If the result is true, all 64 bits of the destination vector are set;
+/// otherwise they are cleared.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> (V)CMPSD </c> instruction.
+///
+/// \param a
+/// A 128-bit vector of [2 x double].
+/// \param b
+/// A 128-bit vector of [2 x double].
+/// \param c
+/// An immediate integer operand, with bits [4:0] specifying which comparison
+/// operation to use: \n
+/// (Note that without avx enabled, only bits [2:0] are supported) \n
+/// 0x00: Equal (ordered, non-signaling) \n
+/// 0x01: Less-than (ordered, signaling) \n
+/// 0x02: Less-than-or-equal (ordered, signaling) \n
+/// 0x03: Unordered (non-signaling) \n
+/// 0x04: Not-equal (unordered, non-signaling) \n
+/// 0x05: Not-less-than (unordered, signaling) \n
+/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
+/// 0x07: Ordered (non-signaling) \n
+/// 0x08: Equal (unordered, non-signaling) \n
+/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
+/// 0x0A: Not-greater-than (unordered, signaling) \n
+/// 0x0B: False (ordered, non-signaling) \n
+/// 0x0C: Not-equal (ordered, non-signaling) \n
+/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
+/// 0x0E: Greater-than (ordered, signaling) \n
+/// 0x0F: True (unordered, non-signaling) \n
+/// 0x10: Equal (ordered, signaling) \n
+/// 0x11: Less-than (ordered, non-signaling) \n
+/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
+/// 0x13: Unordered (signaling) \n
+/// 0x14: Not-equal (unordered, signaling) \n
+/// 0x15: Not-less-than (unordered, non-signaling) \n
+/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
+/// 0x17: Ordered (signaling) \n
+/// 0x18: Equal (unordered, signaling) \n
+/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
+/// 0x1A: Not-greater-than (unordered, non-signaling) \n
+/// 0x1B: False (ordered, signaling) \n
+/// 0x1C: Not-equal (ordered, signaling) \n
+/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
+/// 0x1E: Greater-than (ordered, non-signaling) \n
+/// 0x1F: True (unordered, signaling)
+/// \returns A 128-bit vector of [2 x double] containing the comparison results.
+#define _mm_cmp_sd(a, b, c) \
+ ((__m128d)__builtin_ia32_cmpsd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
+ (c)))
+
#if defined(__cplusplus)
extern "C" {
#endif
diff --git a/clang/lib/Headers/xmmintrin.h b/clang/lib/Headers/xmmintrin.h
index 2d1d33c69f0bbdb..73b1ab4bb4a3d3e 100644
--- a/clang/lib/Headers/xmmintrin.h
+++ b/clang/lib/Headers/xmmintrin.h
@@ -2936,6 +2936,134 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ 0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS 0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS 0x02 /* Less-than-or-equal (ordered, signaling) */
+#define _CMP_UNORD_Q 0x03 /* Unordered (non-signaling) */
+#define _CMP_NEQ_UQ 0x04 /* Not-equal (unordered, non-signaling) */
+#define _CMP_NLT_US 0x05 /* Not-less-than (unordered, signaling) */
+#define _CMP_NLE_US 0x06 /* Not-less-than-or-equal (unordered, signaling) */
+#define _CMP_ORD_Q 0x07 /* Ordered (non-signaling) */
+
+/// Compares each of the corresponding values of two 128-bit vectors of
+/// [4 x float], using the operation specified by the immediate integer
+/// operand.
+///
+/// Returns a [4 x float] vector consisting of four floats corresponding to
+/// the four comparison results: zero if the comparison is false, and all 1's
+/// if the comparison is true.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> (V)CMPPS </c> instruction.
+///
+/// \param a
+/// A 128-bit vector of [4 x float].
+/// \param b
+/// A 128-bit vector of [4 x float].
+/// \param c
+/// An immediate integer operand, with bits [4:0] specifying which comparison
+/// operation to use: \n
+/// (Note that without avx enabled, only bits [2:0] are supported) \n
+/// 0x00: Equal (ordered, non-signaling) \n
+/// 0x01: Less-than (ordered, signaling) \n
+/// 0x02: Less-than-or-equal (ordered, signaling) \n
+/// 0x03: Unordered (non-signaling) \n
+/// 0x04: Not-equal (unordered, non-signaling) \n
+/// 0x05: Not-less-than (unordered, signaling) \n
+/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
+/// 0x07: Ordered (non-signaling) \n
+/// 0x08: Equal (unordered, non-signaling) \n
+/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
+/// 0x0A: Not-greater-than (unordered, signaling) \n
+/// 0x0B: False (ordered, non-signaling) \n
+/// 0x0C: Not-equal (ordered, non-signaling) \n
+/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
+/// 0x0E: Greater-than (ordered, signaling) \n
+/// 0x0F: True (unordered, non-signaling) \n
+/// 0x10: Equal (ordered, signaling) \n
+/// 0x11: Less-than (ordered, non-signaling) \n
+/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
+/// 0x13: Unordered (signaling) \n
+/// 0x14: Not-equal (unordered, signaling) \n
+/// 0x15: Not-less-than (unordered, non-signaling) \n
+/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
+/// 0x17: Ordered (signaling) \n
+/// 0x18: Equal (unordered, signaling) \n
+/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
+/// 0x1A: Not-greater-than (unordered, non-signaling) \n
+/// 0x1B: False (ordered, signaling) \n
+/// 0x1C: Not-equal (ordered, signaling) \n
+/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
+/// 0x1E: Greater-than (ordered, non-signaling) \n
+/// 0x1F: True (unordered, signaling)
+/// \returns A 128-bit vector of [4 x float] containing the comparison results.
+#define _mm_cmp_ps(a, b, c) \
+ ((__m128)__builtin_ia32_cmpps((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), (c)))
+
+/// Compares each of the corresponding scalar values of two 128-bit
+/// vectors of [4 x float], using the operation specified by the immediate
+/// integer operand.
+///
+/// If the result is true, all 32 bits of the destination vector are set;
+/// otherwise they are cleared.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> (V)CMPSS </c> instruction.
+///
+/// \param a
+/// A 128-bit vector of [4 x float].
+/// \param b
+/// A 128-bit vector of [4 x float].
+/// \param c
+/// An immediate integer operand, with bits [4:0] specifying which comparison
+/// operation to use: \n
+/// (Note that without avx enabled, only bits [2:0] are supported) \n
+/// 0x00: Equal (ordered, non-signaling) \n
+/// 0x01: Less-than (ordered, signaling) \n
+/// 0x02: Less-than-or-equal (ordered, signaling) \n
+/// 0x03: Unordered (non-signaling) \n
+/// 0x04: Not-equal (unordered, non-signaling) \n
+/// 0x05: Not-less-than (unordered, signaling) \n
+/// 0x06: Not-less-than-or-equal (unordered, signaling) \n
+/// 0x07: Ordered (non-signaling) \n
+/// 0x08: Equal (unordered, non-signaling) \n
+/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n
+/// 0x0A: Not-greater-than (unordered, signaling) \n
+/// 0x0B: False (ordered, non-signaling) \n
+/// 0x0C: Not-equal (ordered, non-signaling) \n
+/// 0x0D: Greater-than-or-equal (ordered, signaling) \n
+/// 0x0E: Greater-than (ordered, signaling) \n
+/// 0x0F: True (unordered, non-signaling) \n
+/// 0x10: Equal (ordered, signaling) \n
+/// 0x11: Less-than (ordered, non-signaling) \n
+/// 0x12: Less-than-or-equal (ordered, non-signaling) \n
+/// 0x13: Unordered (signaling) \n
+/// 0x14: Not-equal (unordered, signaling) \n
+/// 0x15: Not-less-than (unordered, non-signaling) \n
+/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n
+/// 0x17: Ordered (signaling) \n
+/// 0x18: Equal (unordered, signaling) \n
+/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n
+/// 0x1A: Not-greater-than (unordered, non-signaling) \n
+/// 0x1B: False (ordered, signaling) \n
+/// 0x1C: Not-equal (ordered, signaling) \n
+/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n
+/// 0x1E: Greater-than (ordered, non-signaling) \n
+/// 0x1F: True (unordered, signaling)
+/// \returns A 128-bit vector of [4 x float] containing the comparison results.
+#define _mm_cmp_ss(a, b, c) \
+ ((__m128)__builtin_ia32_cmpss((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), (c)))
#define _MM_ALIGN16 __attribute__((aligned(16)))
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 5fe8c1afec76ff3..4d4bedf75963ac7 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -6276,6 +6276,10 @@ bool Sema::CheckX86BuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
case X86::BI__builtin_ia32_cmpss:
case X86::BI__builtin_ia32_cmppd:
case X86::BI__builtin_ia32_cmpsd:
+ i = 2;
+ l = 0;
+ u = TI.hasFeature("avx") ? 31 : 7;
+ break;
case X86::BI__builtin_ia32_cmpps256:
case X86::BI__builtin_ia32_cmppd256:
case X86::BI__builtin_ia32_cmpps128_mask:
diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c
index 9178ecaf3f8fe43..2d54b5064250712 100644
--- a/clang/test/CodeGen/X86/avx-builtins.c
+++ b/clang/test/CodeGen/X86/avx-builtins.c
@@ -596,54 +596,6 @@ __m256 test_mm256_cmp_ps_true_us(__m256 a, __m256 b) {
return _mm256_cmp_ps(a, b, _CMP_TRUE_US);
}
-__m128d test_mm_cmp_pd_eq_oq(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_eq_oq
- // CHECK: fcmp oeq <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_EQ_OQ);
-}
-
-__m128d test_mm_cmp_pd_lt_os(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_lt_os
- // CHECK: fcmp olt <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_LT_OS);
-}
-
-__m128d test_mm_cmp_pd_le_os(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_le_os
- // CHECK: fcmp ole <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_LE_OS);
-}
-
-__m128d test_mm_cmp_pd_unord_q(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_unord_q
- // CHECK: fcmp uno <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_UNORD_Q);
-}
-
-__m128d test_mm_cmp_pd_neq_uq(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_neq_uq
- // CHECK: fcmp une <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_NEQ_UQ);
-}
-
-__m128d test_mm_cmp_pd_nlt_us(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_nlt_us
- // CHECK: fcmp uge <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_NLT_US);
-}
-
-__m128d test_mm_cmp_pd_nle_us(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_nle_us
- // CHECK: fcmp ugt <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_NLE_US);
-}
-
-__m128d test_mm_cmp_pd_ord_q(__m128d a, __m128d b) {
- // CHECK-LABEL: test_mm_cmp_pd_ord_q
- // CHECK: fcmp ord <2 x double> %{{.*}}, %{{.*}}
- return _mm_cmp_pd(a, b, _CMP_ORD_Q);
-}
-
__m128d test_mm_cmp_pd_eq_uq(__m128d a, __m128d b) {
// CHECK-LABEL: test_mm_cmp_pd_eq_uq
// CHECK: fcmp ueq <2 x double> %{{.*}}, %{{.*}}
@@ -788,54 +740,6 @@ __m128d test_mm_cmp_pd_true_us(__m128d a, __m128d b) {
return _mm_cmp_pd(a, b, _CMP_TRUE_US);
}
-__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_eq_oq
- // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_EQ_OQ);
-}
-
-__m128 test_mm_cmp_ps_lt_os(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_lt_os
- // CHECK: fcmp olt <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_LT_OS);
-}
-
-__m128 test_mm_cmp_ps_le_os(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_le_os
- // CHECK: fcmp ole <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_LE_OS);
-}
-
-__m128 test_mm_cmp_ps_unord_q(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_unord_q
- // CHECK: fcmp uno <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_UNORD_Q);
-}
-
-__m128 test_mm_cmp_ps_neq_uq(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_neq_uq
- // CHECK: fcmp une <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_NEQ_UQ);
-}
-
-__m128 test_mm_cmp_ps_nlt_us(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_nlt_us
- // CHECK: fcmp uge <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_NLT_US);
-}
-
-__m128 test_mm_cmp_ps_nle_us(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_nle_us
- // CHECK: fcmp ugt <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_NLE_US);
-}
-
-__m128 test_mm_cmp_ps_ord_q(__m128 a, __m128 b) {
- // CHECK-LABEL: test_mm_cmp_ps_ord_q
- // CHECK: fcmp ord <4 x float> %{{.*}}, %{{.*}}
- return _mm_cmp_ps(a, b, _CMP_ORD_Q);
-}
-
__m128 test_mm_cmp_ps_eq_uq(__m128 a, __m128 b) {
// CHECK-LABEL: test_mm_cmp_ps_eq_uq
// CHECK: fcmp ueq <4 x float> %{{.*}}, %{{.*}}
diff --git a/clang/test/CodeGen/X86/cmp-avx-builtins-error.c b/clang/test/CodeGen/X86/cmp-avx-builtins-error.c
new file mode 100644
index 000000000000000..2b35aa84492b645
--- /dev/null
+++ b/clang/test/CodeGen/X86/cmp-avx-builtins-error.c
@@ -0,0 +1,22 @@
+// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown \
+// RUN: -target-feature +avx -emit-llvm -fsyntax-only -verify
+// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown \
+// RUN: -target-feature +avx -emit-llvm -fsyntax-only -verify
+
+#include <immintrin.h>
+
+__m128d test_mm_cmp_pd(__m128d a, __m128d b) {
+ return _mm_cmp_pd(a, b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+}
+
+__m128d test_mm_cmp_sd(__m128d a, __m128d b) {
+ return _mm_cmp_sd(a, b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+}
+
+__m128 test_mm_cmp_ps(__m128 a, __m128 b) {
+ return _mm_cmp_pd(a, b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+}
+
+__m128 test_mm_cmp_ss(__m128 a, __m128 b) {
+ return _mm_cmp_sd(a, b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+}
diff --git a/clang/test/CodeGen/X86/sse-builtins.c b/clang/test/CodeGen/X86/sse-builtins.c
index 885c82856522d2a..82f67da39e02bb1 100644
--- a/clang/test/CodeGen/X86/sse-builtins.c
+++ b/clang/test/CodeGen/X86/sse-builtins.c
@@ -813,3 +813,57 @@ __m128 test_mm_xor_ps(__m128 A, __m128 B) {
// CHECK: xor <4 x i32>
return _mm_xor_ps(A, B);
}
+
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_EQ_OQ);
+}
+
+__m128 test_mm_cmp_ps_lt_os(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_lt_os
+ // CHECK: fcmp olt <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_LT_OS);
+}
+
+__m128 test_mm_cmp_ps_le_os(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_le_os
+ // CHECK: fcmp ole <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_LE_OS);
+}
+
+__m128 test_mm_cmp_ps_unord_q(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_unord_q
+ // CHECK: fcmp uno <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_UNORD_Q);
+}
+
+__m128 test_mm_cmp_ps_neq_uq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_neq_uq
+ // CHECK: fcmp une <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_NEQ_UQ);
+}
+
+__m128 test_mm_cmp_ps_nlt_us(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_nlt_us
+ // CHECK: fcmp uge <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_NLT_US);
+}
+
+__m128 test_mm_cmp_ps_nle_us(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_nle_us
+ // CHECK: fcmp ugt <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_NLE_US);
+}
+
+__m128 test_mm_cmp_ps_ord_q(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_ord_q
+ // CHECK: fcmp ord <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_ORD_Q);
+}
+
+__m128 test_mm_cmp_ss(__m128 A, __m128 B) {
+ // CHECK-LABEL: test_mm_cmp_ss
+ // CHECK: call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 7)
+ return _mm_cmp_ss(A, B, _CMP_ORD_Q);
+}
diff --git a/clang/test/CodeGen/X86/sse2-builtins.c b/clang/test/CodeGen/X86/sse2-builtins.c
index 7165d2791827cfc..09b57e3a63727a3 100644
--- a/clang/test/CodeGen/X86/sse2-builtins.c
+++ b/clang/test/CodeGen/X86/sse2-builtins.c
@@ -1719,3 +1719,57 @@ __m128i test_mm_xor_si128(__m128i A, __m128i B) {
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128d test_mm_cmp_pd_eq_oq(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_eq_oq
+ // CHECK: fcmp oeq <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_EQ_OQ);
+}
+
+__m128d test_mm_cmp_pd_lt_os(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_lt_os
+ // CHECK: fcmp olt <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_LT_OS);
+}
+
+__m128d test_mm_cmp_pd_le_os(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_le_os
+ // CHECK: fcmp ole <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_LE_OS);
+}
+
+__m128d test_mm_cmp_pd_unord_q(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_unord_q
+ // CHECK: fcmp uno <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_UNORD_Q);
+}
+
+__m128d test_mm_cmp_pd_neq_uq(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_neq_uq
+ // CHECK: fcmp une <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_NEQ_UQ);
+}
+
+__m128d test_mm_cmp_pd_nlt_us(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_nlt_us
+ // CHECK: fcmp uge <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_NLT_US);
+}
+
+__m128d test_mm_cmp_pd_nle_us(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_nle_us
+ // CHECK: fcmp ugt <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_NLE_US);
+}
+
+__m128d test_mm_cmp_pd_ord_q(__m128d a, __m128d b) {
+ // CHECK-LABEL: test_mm_cmp_pd_ord_q
+ // CHECK: fcmp ord <2 x double> %{{.*}}, %{{.*}}
+ return _mm_cmp_pd(a, b, _CMP_ORD_Q);
+}
+
+__m128d test_mm_cmp_sd(__m128d A, __m128d B) {
+ // CHECK-LABEL: test_mm_cmp_sd
+ // CHECK: call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 7)
+ return _mm_cmp_sd(A, B, _CMP_ORD_Q);
+}
diff --git a/clang/test/CodeGen/target-features-error-2.c b/clang/test/CodeGen/target-features-error-2.c
index 60586fb57f1c044..4f8bc8712aa51db 100644
--- a/clang/test/CodeGen/target-features-error-2.c
+++ b/clang/test/CodeGen/target-features-error-2.c
@@ -14,8 +14,8 @@ int baz(__m256i a) {
#endif
#if NEED_AVX_2
-__m128 need_avx(__m128 a, __m128 b) {
- return _mm_cmp_ps(a, b, 0); // expected-error {{'__builtin_ia32_cmpps' needs target feature avx}}
+__m256 need_avx(__m256 a, __m256 b) {
+ return _mm256_cmp_ps(a, b, 0); // expected-error {{'__builtin_ia32_cmpps256' needs target feature avx}}
}
#endif
diff --git a/clang/test/Sema/builtins-x86.c b/clang/test/Sema/builtins-x86.c
index cbaf7bcde871e19..0882c80514ae9cd 100644
--- a/clang/test/Sema/builtins-x86.c
+++ b/clang/test/Sema/builtins-x86.c
@@ -22,19 +22,19 @@ void call_x86_32_builtins(void) {
}
__m128 test__builtin_ia32_cmpps(__m128 __a, __m128 __b) {
- return __builtin_ia32_cmpps(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+ return __builtin_ia32_cmpps(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 7]}}
}
__m128d test__builtin_ia32_cmppd(__m128d __a, __m128d __b) {
- return __builtin_ia32_cmppd(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+ return __builtin_ia32_cmppd(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 7]}}
}
__m128 test__builtin_ia32_cmpss(__m128 __a, __m128 __b) {
- return __builtin_ia32_cmpss(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+ return __builtin_ia32_cmpss(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 7]}}
}
__m128d test__builtin_ia32_cmpsd(__m128d __a, __m128d __b) {
- return __builtin_ia32_cmpsd(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+ return __builtin_ia32_cmpsd(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 7]}}
}
__mmask16 test__builtin_ia32_cmpps512_mask(__m512 __a, __m512 __b) {
More information about the cfe-commits
mailing list