[clang] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)
Felix via cfe-commits
cfe-commits at lists.llvm.org
Mon Sep 25 18:44:13 PDT 2023
================
@@ -116,6 +116,10 @@ std::pair<uint8_t, uint8_t> PPCXCOFFObjectWriter::getRelocTypeAndSignSize(
return {XCOFF::RelocationType::R_TLS_IE, SignAndSizeForFKData};
case MCSymbolRefExpr::VK_PPC_AIX_TLSLE:
return {XCOFF::RelocationType::R_TLS_LE, SignAndSizeForFKData};
+ case MCSymbolRefExpr::VK_PPC_AIX_TLSLD:
----------------
orcguru wrote:
I think there could be concern regarding this setting, and I observed obj output and the asm-as output is a little bit different on "IsSigned" setting on relocations for symbol ".__tls_get_mod", for example:
obj mode output processed by "llvm-readobj --relocs --expand-relocs"
```
Section (index: 1) .text {
Relocation {
Virtual Address: 0xE
Symbol: _$TLSML (11)
IsSigned: No
FixupBitValue: 0
Length: 16
Type: R_TOC (0x3)
}
Relocation {
Virtual Address: 0x10
Symbol: .__tls_get_mod (1)
IsSigned: No
FixupBitValue: 0
Length: 26
Type: R_RBA (0x18)
}
Relocation {
Virtual Address: 0x16
Symbol: a (13)
IsSigned: No
FixupBitValue: 0
Length: 16
Type: R_TOC (0x3)
}
...
```
asm mode output assembled by "as -a64 -many ", and then processed by "llvm-readobj --relocs --expand-relocs"
```
Section (index: 1) .text {
Relocation {
Virtual Address: 0x16
Symbol: a (13)
IsSigned: No
FixupBitValue: 0
Length: 16
Type: R_TOC (0x3)
}
Relocation {
Virtual Address: 0x1A
Symbol: _$TLSML (15)
IsSigned: No
FixupBitValue: 0
Length: 16
Type: R_TOC (0x3)
}
Relocation {
Virtual Address: 0x1C
Symbol: .__tls_get_mod (3)
IsSigned: Yes
FixupBitValue: 0
Length: 26
Type: R_RBA (0x18)
}
...
```
Notice they have different setting regarding "IsSigned" on the relocation for the ".__tls_get_mod" symbol.
I took another look into the behavior of general-dynamic, and then I saw the same difference there:
obj mode
```
Relocation {
Virtual Address: 0x1C
Symbol: .__tls_get_addr (1)
IsSigned: No
FixupBitValue: 0
Length: 26
Type: R_RBA (0x18)
}
```
asm mode
```
Relocation {
Virtual Address: 0x1C
Symbol: .__tls_get_addr (3)
IsSigned: Yes
FixupBitValue: 0
Length: 26
Type: R_RBA (0x18)
}
```
Looks like LD is aligned with GD in this particular behavior, so this may not be an issue.
https://github.com/llvm/llvm-project/pull/66316
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