[clang] [RISCV] Support floating point VCIX (PR #67094)

[Kito Cheng via cfe-commits]

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@@ -2441,11 +2441,11 @@ define void @test_sf_vc_fvv_se_e16mf4(<vscale x 1 x i16> %vd, <vscale x 1 x i16>
 ; CHECK-NEXT:    sf.vc.fvv 1, v8, v9, fa0
 ; CHECK-NEXT:    ret
 entry:
-  tail call void @llvm.riscv.sf.vc.fvv.se.iXLen.nxv1i16.f16.iXLen(iXLen 1, <vscale x 1 x i16> %vd, <vscale x 1 x i16> %vs2, half %fs1, iXLen %vl)
+  tail call void @llvm.riscv.sf.vc.fvv.se.iXLen.nxv1i16.i16.iXLen(iXLen 1, <vscale x 1 x i16> %vd, <vscale x 1 x i16> %vs2, half %fs1, iXLen %vl)
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kito-cheng wrote:

Why changed to `i16`? arguments is half, which `f16` should be the right type?

https://github.com/llvm/llvm-project/pull/67094