[clang] [clang] Enable --print-supported-extensions for all targets (PR #66586)
Balint Cristian via cfe-commits
cfe-commits at lists.llvm.org
Sat Sep 16 16:15:29 PDT 2023
https://github.com/cbalint13 created https://github.com/llvm/llvm-project/pull/66586
This uses MCSubtargetInfo instead to cover all the architectures. This now also list descriptions along with the names.
The advantage fetching from MCSubtargetInfo is that we rely on tablegen architecture descriptions for all architectures.
---
* Output from `hexagon`:
```
$ ./bin/clang -target hexagon-linux-gnu --print-supported-extensions
clang version 18.0.0 (https://github.com/cbalint13/llvm-project 8049db0990d1695a40de57f136af20ce5340b4a6)
Target: hexagon-unknown-linux-gnu
Thread model: posix
InstalledDir: /home/cbalint/work/GITHUB/llvm-project/build/./bin
All available -march extensions for hexagon
audio (Hexagon Audio extension instructions)
cabac (Emit the CABAC instruction)
compound (Use compound instructions)
duplex (Enable generation of duplex instruction)
hvx (Hexagon HVX instructions)
hvx-ieee-fp (Hexagon HVX IEEE floating point instructions)
hvx-length128b (Hexagon HVX 128B instructions)
hvx-length64b (Hexagon HVX 64B instructions)
hvx-qfloat (Hexagon HVX QFloating point instructions)
hvxv60 (Hexagon HVX instructions)
hvxv62 (Hexagon HVX instructions)
hvxv65 (Hexagon HVX instructions)
{...}
```
* Output from `x86_64`:
```
$ ./bin/clang -target x86_64-linux-gnu --print-supported-extensions
clang version 18.0.0 (https://github.com/cbalint13/llvm-project 8049db0990d1695a40de57f136af20ce5340b4a6)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /home/cbalint/work/GITHUB/llvm-project/build/./bin
All available -march extensions for x86-64
16bit-mode (16-bit mode (i8086))
32bit-mode (32-bit mode (80386))
3dnow (Enable 3DNow! instructions)
3dnowa (Enable 3DNow! Athlon instructions)
64bit (Support 64-bit instructions)
64bit-mode (64-bit mode (x86_64))
adx (Support ADX instructions)
aes (Enable AES instructions)
allow-light-256-bit (Enable generation of 256-bit load/stores even ....
amx-bf16 (Support AMX-BF16 instructions)
amx-complex (Support AMX-COMPLEX instructions)
amx-fp16 (Support AMX amx-fp16 instructions)
amx-int8 (Support AMX-INT8 instructions)
amx-tile (Support AMX-TILE instructions)
avx (Enable AVX instructions)
avx2 (Enable AVX2 instructions)
avx512bf16 (Support bfloat16 floating point)
avx512bitalg (Enable AVX-512 Bit Algorithms)
avx512bw (Enable AVX-512 Byte and Word Instructions)
avx512cd (Enable AVX-512 Conflict Detection Instructions)
{...}
```
---
Cc @DavidSpickett , @DanielKristofKiss , @MaskRay
I also reference here #66582 for past comments on extracting information from MCSubtargetInfo .
>From 09197ec356dec013d47c4938c942082f0acce3cf Mon Sep 17 00:00:00 2001
From: Balint Cristian <cristian.balint at gmail.com>
Date: Sun, 17 Sep 2023 01:59:36 +0300
Subject: [PATCH] [clang] Enable --print-supported-extensions for all targets
Signed-off-by: Balint Cristian <cristian.balint at gmail.com>
---
clang/include/clang/Driver/Options.td | 2 +-
clang/lib/Driver/Driver.cpp | 9 -------
.../test/Driver/print-supported-extensions.c | 4 ---
clang/tools/driver/cc1_main.cpp | 25 +++++++------------
llvm/include/llvm/MC/MCSubtargetInfo.h | 6 +++++
5 files changed, 16 insertions(+), 30 deletions(-)
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 553c7928c4f949e..431f2f5c4109232 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5277,7 +5277,7 @@ def print_supported_cpus : Flag<["-", "--"], "print-supported-cpus">,
MarshallingInfoFlag<FrontendOpts<"PrintSupportedCPUs">>;
def print_supported_extensions : Flag<["-", "--"], "print-supported-extensions">,
Visibility<[ClangOption, CC1Option, CLOption]>,
- HelpText<"Print supported -march extensions (RISC-V, AArch64 and ARM only)">,
+ HelpText<"Print supported -march extensions">,
MarshallingInfoFlag<FrontendOpts<"PrintSupportedExtensions">>;
def : Flag<["-"], "mcpu=help">, Alias<print_supported_cpus>;
def : Flag<["-"], "mtune=help">, Alias<print_supported_cpus>;
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index 84b8fc7685fed42..8b73618fdc87a39 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -4283,15 +4283,6 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,
// RISCVMarchHelp in RISCVISAInfo.cpp that prints out supported extensions
// and quits.
if (Arg *A = Args.getLastArg(Opt)) {
- if (Opt == options::OPT_print_supported_extensions &&
- !C.getDefaultToolChain().getTriple().isRISCV() &&
- !C.getDefaultToolChain().getTriple().isAArch64() &&
- !C.getDefaultToolChain().getTriple().isARM()) {
- C.getDriver().Diag(diag::err_opt_not_valid_on_target)
- << "--print-supported-extensions";
- return;
- }
-
// Use the -mcpu=? flag as the dummy input to cc1.
Actions.clear();
Action *InputAc = C.MakeAction<InputAction>(*A, types::TY_C);
diff --git a/clang/test/Driver/print-supported-extensions.c b/clang/test/Driver/print-supported-extensions.c
index 8daf4d8a34b8a60..0c41d722310cfd5 100644
--- a/clang/test/Driver/print-supported-extensions.c
+++ b/clang/test/Driver/print-supported-extensions.c
@@ -12,7 +12,3 @@
// RUN: %if arm-registered-target %{ %clang --target=arm-linux-gnu \
// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix ARM %}
// ARM: All available -march extensions for ARM
-
-// RUN: %if x86-registered-target %{ not %clang --target=x86_64-linux-gnu \
-// RUN: --print-supported-extensions 2>&1 | FileCheck %s --check-prefix X86 %}
-// X86: error: option '--print-supported-extensions' cannot be specified on this target
\ No newline at end of file
diff --git a/clang/tools/driver/cc1_main.cpp b/clang/tools/driver/cc1_main.cpp
index f0d7b5c3889dc1f..25c435054b6927b 100644
--- a/clang/tools/driver/cc1_main.cpp
+++ b/clang/tools/driver/cc1_main.cpp
@@ -28,6 +28,7 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/LinkAllPasses.h"
+#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Option/Arg.h"
#include "llvm/Option/ArgList.h"
@@ -38,15 +39,12 @@
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/Process.h"
-#include "llvm/Support/RISCVISAInfo.h"
#include "llvm/Support/Signals.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Support/TimeProfiler.h"
#include "llvm/Support/Timer.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/TargetParser/AArch64TargetParser.h"
-#include "llvm/TargetParser/ARMTargetParser.h"
#include <cstdio>
#ifdef CLANG_HAVE_RLIMITS
@@ -197,19 +195,14 @@ static int PrintSupportedExtensions(std::string TargetStr) {
llvm::TargetOptions Options;
std::unique_ptr<llvm::TargetMachine> TheTargetMachine(
TheTarget->createTargetMachine(TargetStr, "", "", Options, std::nullopt));
- const llvm::Triple &MachineTriple = TheTargetMachine->getTargetTriple();
-
- if (MachineTriple.isRISCV())
- llvm::riscvExtensionsHelp();
- else if (MachineTriple.isAArch64())
- llvm::AArch64::PrintSupportedExtensions();
- else if (MachineTriple.isARM())
- llvm::ARM::PrintSupportedExtensions();
- else {
- // The option was already checked in Driver::HandleImmediateArgs,
- // so we do not expect to get here if we are not a supported architecture.
- assert(0 && "Unhandled triple for --print-supported-extensions option.");
- return 1;
+ const llvm::MCSubtargetInfo *MCInfo = TheTargetMachine->getMCSubtargetInfo();
+
+ llvm::ArrayRef<llvm::SubtargetFeatureKV> Features =
+ MCInfo->getAllProcessorFeatures();
+ llvm::outs() << "All available -march extensions for " << TheTarget->getName()
+ << "\n\n";
+ for (const llvm::SubtargetFeatureKV &feature : Features) {
+ llvm::outs() << llvm::format(" %-40s (%s)\n", feature.Key, feature.Desc);
}
return 0;
diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h
index c1533ac8d0059f5..f172a799aa3331c 100644
--- a/llvm/include/llvm/MC/MCSubtargetInfo.h
+++ b/llvm/include/llvm/MC/MCSubtargetInfo.h
@@ -230,10 +230,16 @@ class MCSubtargetInfo {
return Found != ProcDesc.end() && StringRef(Found->Key) == CPU;
}
+ /// Return processor descriptions.
ArrayRef<SubtargetSubTypeKV> getAllProcessorDescriptions() const {
return ProcDesc;
}
+ /// Return processor features.
+ ArrayRef<SubtargetFeatureKV> getAllProcessorFeatures() const {
+ return ProcFeatures;
+ }
+
virtual unsigned getHwMode() const { return 0; }
/// Return the cache size in bytes for the given level of cache.
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