[clang] [AArch64]: Refactor target parser to use Bitset. (PR #65423)

via cfe-commits cfe-commits at lists.llvm.org
Mon Sep 11 09:54:06 PDT 2023


llvmbot wrote:

@llvm/pr-subscribers-clang

<details>
<summary>Changes</summary>

Use Bitset instead of BitMasking for the Architecture Extensions, because the number of extensions will exceed the bitmask max size.

--

Patch is 133.65 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/65423.diff

5 Files Affected:

- (modified) clang/lib/Basic/Targets/AArch64.cpp (+1-1) 
- (modified) clang/lib/Driver/ToolChains/Arch/AArch64.cpp (+1-1) 
- (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+281-209) 
- (modified) llvm/lib/TargetParser/AArch64TargetParser.cpp (+4-3) 
- (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+785-690) 


<pre>
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index 6c43c8b592622d0..78884b7dc1ff6fa 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -968,7 +968,7 @@ bool AArch64TargetInfo::initFeatureMap(
   // Parse the CPU and add any implied features.
   std::optional<llvm::AArch64::CpuInfo> CpuInfo = llvm::AArch64::parseCpu(CPU);
   if (CpuInfo) {
-    uint64_t Exts = CpuInfo->getImpliedExtensions();
+    llvm::Bitset Exts = CpuInfo->getImpliedExtensions();
     std::vector<StringRef> CPUFeats;
     llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
     for (auto F : CPUFeats) {
diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 507ad9247704103..19d454dd8bf3643 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -158,7 +158,7 @@ static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
 
     Features.push_back(ArchInfo->ArchFeature);
 
-    uint64_t Extension = CpuInfo->getImpliedExtensions();
+    llvm::Bitset Extension = CpuInfo->getImpliedExtensions();
     if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
       return false;
   }
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index dc4cdfa8e90ac12..c432718824105e3 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -15,6 +15,7 @@
 #define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/Bitset.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/VersionTuple.h"
 #include <array>
@@ -96,64 +97,65 @@ static_assert(FEAT_MAX <= 64,
 // Arch extension modifiers for CPUs. These are labelled with their Arm ARM
 // feature name (though the canonical reference for those is AArch64.td)
 // clang-format off
-enum ArchExtKind : uint64_t {
-  AEK_NONE =        1,
-  AEK_CRC =         1 << 1,  // FEAT_CRC32
-  AEK_CRYPTO =      1 << 2,
-  AEK_FP =          1 << 3,  // FEAT_FP
-  AEK_SIMD =        1 << 4,  // FEAT_AdvSIMD
-  AEK_FP16 =        1 << 5,  // FEAT_FP16
-  AEK_PROFILE =     1 << 6,  // FEAT_SPE
-  AEK_RAS =         1 << 7,  // FEAT_RAS, FEAT_RASv1p1
-  AEK_LSE =         1 << 8,  // FEAT_LSE
-  AEK_SVE =         1 << 9,  // FEAT_SVE
-  AEK_DOTPROD =     1 << 10, // FEAT_DotProd
-  AEK_RCPC =        1 << 11, // FEAT_LRCPC
-  AEK_RDM =         1 << 12, // FEAT_RDM
-  AEK_SM4 =         1 << 13, // FEAT_SM4, FEAT_SM3
-  AEK_SHA3 =        1 << 14, // FEAT_SHA3, FEAT_SHA512
-  AEK_SHA2 =        1 << 15, // FEAT_SHA1, FEAT_SHA256
-  AEK_AES =         1 << 16, // FEAT_AES, FEAT_PMULL
-  AEK_FP16FML =     1 << 17, // FEAT_FHM
-  AEK_RAND =        1 << 18, // FEAT_RNG
-  AEK_MTE =         1 << 19, // FEAT_MTE, FEAT_MTE2
-  AEK_SSBS =        1 << 20, // FEAT_SSBS, FEAT_SSBS2
-  AEK_SB =          1 << 21, // FEAT_SB
-  AEK_PREDRES =     1 << 22, // FEAT_SPECRES
-  AEK_SVE2 =        1 << 23, // FEAT_SVE2
-  AEK_SVE2AES =     1 << 24, // FEAT_SVE_AES, FEAT_SVE_PMULL128
-  AEK_SVE2SM4 =     1 << 25, // FEAT_SVE_SM4
-  AEK_SVE2SHA3 =    1 << 26, // FEAT_SVE_SHA3
-  AEK_SVE2BITPERM = 1 << 27, // FEAT_SVE_BitPerm
-  AEK_TME =         1 << 28, // FEAT_TME
-  AEK_BF16 =        1 << 29, // FEAT_BF16
-  AEK_I8MM =        1 << 30, // FEAT_I8MM
-  AEK_F32MM =       1ULL << 31, // FEAT_F32MM
-  AEK_F64MM =       1ULL << 32, // FEAT_F64MM
-  AEK_LS64 =        1ULL << 33, // FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA
-  AEK_BRBE =        1ULL << 34, // FEAT_BRBE
-  AEK_PAUTH =       1ULL << 35, // FEAT_PAuth
-  AEK_FLAGM =       1ULL << 36, // FEAT_FlagM
-  AEK_SME =         1ULL << 37, // FEAT_SME
-  AEK_SMEF64F64 =   1ULL << 38, // FEAT_SME_F64F64
-  AEK_SMEI16I64 =   1ULL << 39, // FEAT_SME_I16I64
-  AEK_HBC =         1ULL << 40, // FEAT_HBC
-  AEK_MOPS =        1ULL << 41, // FEAT_MOPS
-  AEK_PERFMON =     1ULL << 42, // FEAT_PMUv3
-  AEK_SME2 =        1ULL << 43, // FEAT_SME2
-  AEK_SVE2p1 =      1ULL << 44, // FEAT_SVE2p1
-  AEK_SME2p1 =      1ULL << 45, // FEAT_SME2p1
-  AEK_B16B16 =      1ULL << 46, // FEAT_B16B16
-  AEK_SMEF16F16 =   1ULL << 47, // FEAT_SMEF16F16
-  AEK_CSSC =        1ULL << 48, // FEAT_CSSC
-  AEK_RCPC3 =       1ULL << 49, // FEAT_LRCPC3
-  AEK_THE =         1ULL << 50, // FEAT_THE
-  AEK_D128 =        1ULL << 51, // FEAT_D128
-  AEK_LSE128 =      1ULL << 52, // FEAT_LSE128
-  AEK_SPECRES2 =    1ULL << 53, // FEAT_SPECRES2
-  AEK_RASv2 =       1ULL << 54, // FEAT_RASv2
-  AEK_ITE =         1ULL << 55, // FEAT_ITE
-  AEK_GCS =         1ULL << 56, // FEAT_GCS
+enum ArchExtKind : unsigned {
+  AEK_NONE =          1,
+  AEK_CRC =           2,  // FEAT_CRC32
+  AEK_CRYPTO =        3,
+  AEK_FP =            4,  // FEAT_FP
+  AEK_SIMD =          5,  // FEAT_AdvSIMD
+  AEK_FP16 =          6,  // FEAT_FP16
+  AEK_PROFILE =       7,  // FEAT_SPE
+  AEK_RAS =           8,  // FEAT_RAS, FEAT_RASv1p1
+  AEK_LSE =           9,  // FEAT_LSE
+  AEK_SVE =           10,  // FEAT_SVE
+  AEK_DOTPROD =       11, // FEAT_DotProd
+  AEK_RCPC =          12, // FEAT_LRCPC
+  AEK_RDM =           13, // FEAT_RDM
+  AEK_SM4 =           14, // FEAT_SM4, FEAT_SM3
+  AEK_SHA3 =          15, // FEAT_SHA3, FEAT_SHA512
+  AEK_SHA2 =          16, // FEAT_SHA1, FEAT_SHA256
+  AEK_AES =           17, // FEAT_AES, FEAT_PMULL
+  AEK_FP16FML =       18, // FEAT_FHM
+  AEK_RAND =          19, // FEAT_RNG
+  AEK_MTE =           20, // FEAT_MTE, FEAT_MTE2
+  AEK_SSBS =          21, // FEAT_SSBS, FEAT_SSBS2
+  AEK_SB =            22, // FEAT_SB
+  AEK_PREDRES =       23, // FEAT_SPECRES
+  AEK_SVE2 =          24, // FEAT_SVE2
+  AEK_SVE2AES =       25, // FEAT_SVE_AES, FEAT_SVE_PMULL128
+  AEK_SVE2SM4 =       26, // FEAT_SVE_SM4
+  AEK_SVE2SHA3 =      27, // FEAT_SVE_SHA3
+  AEK_SVE2BITPERM =   28, // FEAT_SVE_BitPerm
+  AEK_TME =           29, // FEAT_TME
+  AEK_BF16 =          30, // FEAT_BF16
+  AEK_I8MM =          31, // FEAT_I8MM
+  AEK_F32MM =         32, // FEAT_F32MM
+  AEK_F64MM =         33, // FEAT_F64MM
+  AEK_LS64 =          34, // FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA
+  AEK_BRBE =          35, // FEAT_BRBE
+  AEK_PAUTH =         36, // FEAT_PAuth
+  AEK_FLAGM =         37, // FEAT_FlagM
+  AEK_SME =           38, // FEAT_SME
+  AEK_SMEF64F64 =     39, // FEAT_SME_F64F64
+  AEK_SMEI16I64 =     40, // FEAT_SME_I16I64
+  AEK_HBC =           41, // FEAT_HBC
+  AEK_MOPS =          42, // FEAT_MOPS
+  AEK_PERFMON =       43, // FEAT_PMUv3
+  AEK_SME2 =          44, // FEAT_SME2
+  AEK_SVE2p1 =        45, // FEAT_SVE2p1
+  AEK_SME2p1 =        46, // FEAT_SME2p1
+  AEK_B16B16 =        47, // FEAT_B16B16
+  AEK_SMEF16F16 =     48, // FEAT_SMEF16F16
+  AEK_CSSC =          49, // FEAT_CSSC
+  AEK_RCPC3 =         50, // FEAT_LRCPC3
+  AEK_THE =           51, // FEAT_THE
+  AEK_D128 =          52, // FEAT_D128
+  AEK_LSE128 =        53, // FEAT_LSE128
+  AEK_SPECRES2 =      54, // FEAT_SPECRES2
+  AEK_RASv2 =         55, // FEAT_RASv2
+  AEK_ITE =           56, // FEAT_ITE
+  AEK_GCS =           57, // FEAT_GCS
+  AEK_EXTENSIONS_LAST =  58
 };
 // clang-format on
 
@@ -273,7 +275,8 @@ struct ArchInfo {
   ArchProfile Profile;   // Architecuture profile
   StringRef Name;        // Human readable name, e.g. "armv8.1-a"
   StringRef ArchFeature; // Command line feature flag, e.g. +v8a
-  uint64_t DefaultExts;  // bitfield of default extensions ArchExtKind
+  Bitset<AArch64::AEK_EXTENSIONS_LAST>
+      DefaultExts; // bitfield of default extensions ArchExtKind
 
   bool operator==(const ArchInfo &Other) const {
     return this->Name == Other.Name;
@@ -315,23 +318,23 @@ struct ArchInfo {
 };
 
 // clang-format off
-inline constexpr ArchInfo ARMV8A    = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_FP | AArch64::AEK_SIMD), };
-inline constexpr ArchInfo ARMV8_1A  = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)};
-inline constexpr ArchInfo ARMV8_2A  = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)};
-inline constexpr ArchInfo ARMV8_3A  = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)};
-inline constexpr ArchInfo ARMV8_4A  = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)};
+inline constexpr ArchInfo ARMV8A    = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_FP, AArch64::AEK_SIMD})), };
+inline constexpr ArchInfo ARMV8_1A  = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_CRC, AArch64::AEK_LSE, AArch64::AEK_RDM}))};
+inline constexpr ArchInfo ARMV8_2A  = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_RAS}))};
+inline constexpr ArchInfo ARMV8_3A  = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_RCPC}))};
+inline constexpr ArchInfo ARMV8_4A  = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_DOTPROD}))};
 inline constexpr ArchInfo ARMV8_5A  = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)};
-inline constexpr ArchInfo ARMV8_6A  = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
+inline constexpr ArchInfo ARMV8_6A  = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_BF16, AArch64::AEK_I8MM}))};
 inline constexpr ArchInfo ARMV8_7A  = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)};
-inline constexpr ArchInfo ARMV8_8A  = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
-inline constexpr ArchInfo ARMV8_9A  = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)};
-inline constexpr ArchInfo ARMV9A    = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)};
-inline constexpr ArchInfo ARMV9_1A  = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
+inline constexpr ArchInfo ARMV8_8A  = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
+inline constexpr ArchInfo ARMV8_9A  = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))};
+inline constexpr ArchInfo ARMV9A    = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_FP16, AArch64::AEK_SVE, AArch64::AEK_SVE2}))};
+inline constexpr ArchInfo ARMV9_1A  = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_BF16, AArch64::AEK_I8MM}))};
 inline constexpr ArchInfo ARMV9_2A  = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)};
-inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
-inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)};
+inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
+inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))};
 // For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions.
-inline constexpr ArchInfo ARMV8R    = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((ARMV8_5A.DefaultExts ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), };
+inline constexpr ArchInfo ARMV8R    = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (Bitset(ARMV8_5A.DefaultExts) | Bitset<AArch64::AEK_EXTENSIONS_LAST>({AArch64::AEK_SSBS, AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_SB}).flip(AArch64::AEK_LSE))};
 // clang-format on
 
 // The set of all architectures
@@ -345,203 +348,271 @@ static constexpr std::array<const ArchInfo *, 16> ArchInfos = {
 struct CpuInfo {
   StringRef Name; // Name, as written for -mcpu.
   const ArchInfo &Arch;
-  uint64_t DefaultExtensions; // Default extensions for this CPU. These will be
-                              // ORd with the architecture defaults.
+  Bitset<AArch64::AEK_EXTENSIONS_LAST>
+      DefaultExtensions; // Default extensions for this CPU. These will be
+                         // ORd with the architecture defaults.
 
-  uint64_t getImpliedExtensions() const {
-    return DefaultExtensions | Arch.DefaultExts;
+  Bitset<AArch64::AEK_EXTENSIONS_LAST> getImpliedExtensions() const {
+    Bitset<AArch64::AEK_EXTENSIONS_LAST> ImpliedExts;
+    ImpliedExts |= DefaultExtensions;
+    ImpliedExts |= Arch.DefaultExts;
+    return ImpliedExts;
   }
 };
 
 inline constexpr CpuInfo CpuInfos[] = {
     {"cortex-a34", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a35", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a53", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a55", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC}))},
     {"cortex-a510", ARMV9A,
-     (AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SB |
-      AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
-      AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
-      AArch64::AEK_FP16FML)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SB,
+          AArch64::AEK_PAUTH, AArch64::AEK_MTE, AArch64::AEK_SSBS,
+          AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
+          AArch64::AEK_FP16FML}))},
     {"cortex-a57", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a65", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_DOTPROD |
-      AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_SSBS)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_DOTPROD,
+          AArch64::AEK_FP16, AArch64::AEK_RCPC, AArch64::AEK_SSBS}))},
     {"cortex-a65ae", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_DOTPROD |
-      AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_SSBS)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_DOTPROD,
+          AArch64::AEK_FP16, AArch64::AEK_RCPC, AArch64::AEK_SSBS}))},
     {"cortex-a72", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a73", ARMV8A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_CRC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC}))},
     {"cortex-a75", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC}))},
     {"cortex-a76", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS}))},
     {"cortex-a76ae", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS}))},
     {"cortex-a77", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | AArch64::AEK_SSBS)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_SSBS}))},
     {"cortex-a78", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS |
-      AArch64::AEK_PROFILE)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
+          AArch64::AEK_PROFILE}))},
     {"cortex-a78c", ARMV8_2A,
-     (AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_FP16 |
-      AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS |
-      AArch64::AEK_PROFILE | AArch64::AEK_FLAGM | AArch64::AEK_PAUTH |
-      AArch64::AEK_FP16FML)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
+          AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
+          AArch64::AEK_PROFILE, AArch64::AEK_FLAGM, AArch64::AEK_PAUTH,
+          AArch64::AEK_FP16FML}))},
     {"cortex-a710", ARMV9A,
-     (AArch64::AEK_MTE | AArch64::AEK_PAUTH | AArch64::AEK_FLAGM |
-      AArch64::AEK_SB | AArch64::AEK_I8MM | AArch64::AEK_FP16FML |
-      AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
-      AArch64::AEK_BF16)},
+     (Bitset<AArch64::AEK_EXTENSIONS_LAST>(
+         {AArch64::AEK_MTE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
+          AArch64::AEK_SB, AArch64::AEK_I8MM, AArch64::AEK_FP16FML,
+          AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
+          AArch64::AEK_BF16}))},
     {"cortex-a715", ARMV9A,
-     (AArch64::AEK_SB | AArch64::AEK_SSBS | AArch64::AEK_MTE |
-      AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PAUTH |
-      AArch64::AEK_I8MM | AArch64::AEK_PREDRES | AArch64::AEK_PERFMON |
-      AArch64::AEK_PROFILE | AArch64::AEK_SVE | AArch64::AEK_SVE2BITPERM |
-      AArch64::AEK_BF16 | AArch64::AEK_FLAGM)},
-    {"cortex-r82", ARMV8R...
<truncated>
</pre>

</details>

https://github.com/llvm/llvm-project/pull/65423


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